Strategies for lot acceptance testing using CMOS transistors and ICs

Direct-correlation and simple overstress methods for estimating IC response in strategic and space environments from laboratory transistor and IC data are investigated. Transistors and ICs were irradiated at dose rates from 0.2 rad(SiO/sub 2/)/s to 10/sup 6/ rad(SiO/sub 2/)/s. Over a wide range of process conditions and hardness levels, laboratory measurements of threshold voltage shift due to oxide trapped charge correlate well with IC leakage current at high dose rates for ICs with gate-oxide-dominated response. For ICs whose response is dominated by parasitic field-oxide structures, laboratory measurements of both transistor and IC leakage currents correlate well with IC hardness at high dose rates. For dose levels up to approximately=500 krad(SiO/sub 2/), it is shown that a simple factor-of-three overtest can be used as a conservative estimate of radiation hardness for strategic applications, provided that both functional and parametric testing is performed following X-ray irradiation at a dose rate of approximately=2000 rad(SiO/sub 2/)/s. For space environments, a laboratory irradiation to 1.5 times the required system level followed by a one-week 100 degrees C biased anneal gave conservative estimates of IC hardness. >

[1]  Dose Rate Effects on Total Dose Damage , 1986, IEEE Transactions on Nuclear Science.

[2]  Allan H. Johnston,et al.  A Framework for an Integrated Set of Standards for Ionizing Radiation Testing of Microelectronics , 1987, IEEE Transactions on Nuclear Science.

[3]  Dennis B. Brown,et al.  Time dependence of interface trap formation in MOSFETs following pulsed irradiation , 1988 .

[4]  J. S. Browning,et al.  Total dose characterization of a CMOS technology at high dose rates and temperatures , 1988 .

[5]  Dose Enhancement Effects in MOSFET IC's Exposed in Typical 60Co Facilities , 1983, IEEE Transactions on Nuclear Science.

[6]  P. S. Winokur,et al.  Correlating the Radiation Response of MOS Capacitors and Transistors , 1984, IEEE Transactions on Nuclear Science.

[7]  P. Winokur,et al.  Simple technique for separating the effects of interface traps and trapped‐oxide charge in metal‐oxide‐semiconductor transistors , 1986 .

[8]  J. Boesch,et al.  Time-dependent interface trap effects in MOS devices , 1988 .

[9]  Allan H. Johnston,et al.  Super Recovery of Total Dose Damage in MOS Devices , 1984, IEEE Transactions on Nuclear Science.

[10]  Allan H. Johnston,et al.  Total Dose Effects at Low Dose Rates , 1986, IEEE Transactions on Nuclear Science.

[11]  P. S. Winokur,et al.  Physical Mechanisms Contributing to Device "Rebound" , 1984, IEEE Transactions on Nuclear Science.

[12]  T. R. Oldham,et al.  Comparison of 60Co Response and 10 KeV X-Ray Response in MOS Capacitors , 1983, IEEE Transactions on Nuclear Science.

[13]  Daniel M. Fleetwood,et al.  Using laboratory X-ray and cobalt-60 irradiations to predict CMOS device response in strategic and space environments , 1988 .

[14]  R. J. Maier,et al.  A Programmable Test System for Transient Annealing Characterization of Irradiated MOSFETs , 1987, IEEE Transactions on Nuclear Science.

[15]  P. V. Dressendorfer,et al.  A Simple Method to Identify Radiation and Annealing Biases That Lead to Worst-Case CMOS Static Ram Postirradiation Response , 1987, IEEE Transactions on Nuclear Science.

[16]  P. S. Winokur,et al.  Total-Dose Failure Mechanisms of Integrated Circuits in Laboratory and Space Environments , 1987, IEEE Transactions on Nuclear Science.

[17]  P. S. Winokur,et al.  Total-Dose Radiation and Annealing Studies: Implications for Hardness Assurance Testing , 1986, IEEE Transactions on Nuclear Science.

[18]  James R. Schwank,et al.  Correlation of Radiation Effects in Transistors and Integrated Circuits , 1985, IEEE Transactions on Nuclear Science.

[19]  R. L. Pease,et al.  An improved standard total dose test for CMOS space electronics , 1989 .

[20]  Steven Winegarden,et al.  Paragons for Memory Test , 1981, ITC.

[21]  Paltiel Buchman,et al.  Total Dose Hardness Assurance for Microcircuits for Space Environment , 1986, IEEE Transactions on Nuclear Science.

[22]  P. V. Dressendorfer,et al.  A Reevaluation of Worst-Case Postirradiation Response for Hardened MOS Transistors , 1987, IEEE Transactions on Nuclear Science.

[23]  P. S. Winokur,et al.  Optimizing and Controlling the Radiation Hardness of a Si-Gate CMOS Process , 1985, IEEE Transactions on Nuclear Science.