A fast board-power-voltage fluctuation analysis system for chip-package-board Co-design

Recent progress trend in electronics supported by high-speed signal processing of semiconductor chips and high-density packaging technologies reduce layout margins and bring packaging design difficulties. To reduce the time loss by the rework and increase packaging design efficiency in the early stage of product development, short turnaround-time estimation techniques for analyzing the electrical performance integrating chip-package-board characteristics have been required. This paper describes a fast board-power-voltage fluctuation analysis system to realize the chip-package-board co-design.