Low-power design methodology for module-wise dynamic voltage and frequency scaling with dynamic de-skewing systems
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Takeshi Kitahara | Hiroyuki Hara | Fumihiro Minami | Shinichiro Shiratake | Tomoyuki Yoda | Tetsuaki Utsumi | Yoshiki Tsukiboshi
[1] Kimiyoshi Usami,et al. Automated selective multi-threshold design for ultra-low standby applications , 2002, ISLPED '02.
[2] Takashi Ishikawa,et al. Design methodology of ultra low-power MPEG4 codec core exploiting voltage scaling techniques , 1998, Proceedings 1998 Design and Automation Conference. 35th DAC. (Cat. No.98CH36175).
[3] Mohamed I. Elmasry,et al. Dynamic and leakage power reduction in MTCMOS circuits using an automated efficient gate clustering technique , 2002, DAC '02.
[4] T. Fujita,et al. A 0.9 V 150 MHz 10 mW 4 mm/sup 2/ 2-D discrete cosine transform core processor with variable-threshold-voltage scheme , 1996, 1996 IEEE International Solid-State Circuits Conference. Digest of TEchnical Papers, ISSCC.
[5] Petru Eles,et al. Simultaneous communication and processor voltage scaling for dynamic and leakage energy reduction in time-constrained systems , 2004, ICCAD 2004.
[6] Rajesh K. Gupta,et al. Leakage aware dynamic voltage scaling for real-time embedded systems , 2004, Proceedings. 41st Design Automation Conference, 2004..
[7] David Blaauw,et al. Reducing pipeline energy demands with local DVS and dynamic retiming , 2004, Proceedings of the 2004 International Symposium on Low Power Electronics and Design (IEEE Cat. No.04TH8758).
[8] Takeshi Kitahara,et al. Area-efficient selective multi-threshold CMOS design methodology for standby leakage power reduction , 2005, Design, Automation and Test in Europe.
[9] Anantha P. Chandrakasan,et al. Low Power Digital CMOS Design , 1995 .
[10] Pai H. Chou,et al. An efficient voltage scaling algorithm for complex SoCs with few number of voltage modes , 2004, Proceedings of the 2004 International Symposium on Low Power Electronics and Design (IEEE Cat. No.04TH8758).
[11] Massoud Pedram,et al. Dynamic voltage and frequency scaling under a precise energy model considering variable and fixed components of the system power dissipation , 2004, ICCAD 2004.
[12] Taewhan Kim,et al. Profile-based optimal intra-task voltage scheduling for hard real-time applications , 2004, Proceedings. 41st Design Automation Conference, 2004..
[13] T. Fujiyoshi,et al. A 63-mW H.264/MPEG-4 audio/visual codec LSI with module-wise dynamic Voltage/frequency scaling , 2006, IEEE Journal of Solid-State Circuits.