Using Lin-Kernighan algorithm for look-up table compression to improve code density
暂无分享,去创建一个
[1] Takao Onoye,et al. An object code compression approach to embedded processors , 1997, Proceedings of 1997 International Symposium on Low Power Electronics and Design.
[2] Shmuel Tomi Klein,et al. Space- and Time-Efficient Decoding with Canonical Huffman Trees , 1997, CPM.
[3] Ian H. Witten,et al. Text Compression , 1990, 125 Problems in Text Algorithms.
[4] A. Wolfe,et al. Executing Compressed Programs On An Embedded RISC Architecture , 1992, [1992] Proceedings the 25th Annual International Symposium on Microarchitecture MICRO 25.
[5] Jörg Henkel,et al. A unified architecture for adaptive compression of data and code on embedded systems , 2005, 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design.
[6] Amir Roth,et al. DISE: a programmable macro engine for customizing applications , 2003, ISCA '03.
[7] Thomas M. Conte,et al. Compiler-driven cached code compression schemes for embedded ILP processors , 1999, MICRO-32. Proceedings of the 32nd Annual ACM/IEEE International Symposium on Microarchitecture.
[8] Yakov Nekrich. Decoding of canonical Huffman codes with look-up tables , 2000, Proceedings DCC 2000. Data Compression Conference.
[9] Luca Benini,et al. Hardware-assisted data compression for energy minimization in systems with embedded processors , 2002, Proceedings 2002 Design, Automation and Test in Europe Conference and Exhibition.
[10] Andrew Wolfe,et al. Executing compressed programs on an embedded RISC architecture , 1992, MICRO 1992.
[11] Yuan Xie,et al. LZW-based code compression for VLIW embedded systems , 2004, Proceedings Design, Automation and Test in Europe Conference and Exhibition.
[12] Hiroyuki Tomiyama,et al. Instruction encoding techniques for area minimization of instruction ROM , 1998, Proceedings. 11th International Symposium on System Synthesis (Cat. No.98EX210).
[13] S. R. Jones,et al. High performance code compression architecture for the embedded ARM/THUMB processor , 2004, CF '04.
[14] Wayne H. Wolf,et al. SAMC: a code compression algorithm for embedded processors , 1999, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[15] Lars Wanhammar,et al. High speed pipelined parallel Huffman decoding , 1997, Proceedings of 1997 IEEE International Symposium on Circuits and Systems. Circuits and Systems in the Information Age ISCAS '97.
[16] Keld Helsgaun,et al. An effective implementation of the Lin-Kernighan traveling salesman heuristic , 2000, Eur. J. Oper. Res..
[17] Trevor N. Mudge,et al. Improving code density using compression techniques , 1997, Proceedings of 30th Annual International Symposium on Microarchitecture.
[18] Thomas R. Gross,et al. Adaptive Main Memory Compression , 2005, USENIX Annual Technical Conference, General Track.
[19] G. G. Stokes. "J." , 1890, The New Yale Book of Quotations.
[20] Lei Yang,et al. CRAMES: compressed RAM for embedded systems , 2005, 2005 Third IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS'05).
[21] P. P. Chakrabarti,et al. Dictionary based code compression for variable length instruction encodings , 2005, 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design.