System-level routing of mixed-signal ASICs in WREN

This paper presents new techniques for gfobaf and detailed routing of the macrocell-style analog core of a mired-signal ASK. We combine a comparatively simple geometric model of rhe problem with an aggressive simulated annealing formula!ion that selects paths while accommodating numerous signal-integrity constraints. Experimental results demonstrate that it is critical lo aIrack such constraints both globally (system-level) and locally (channel-level) to meet designer-specified performance targets.

[1]  P. Groeneveld.  Wire ordering for detailed routing , 1989, IEEE Design & Test of Computers.

[2]  Hon Wai Leong,et al.  SIMULATED-ANNEALING CHANNEL ROUTER. , 1985 .

[3]  Ernest S. Kuh,et al.  Glitter: A Gridless Variable-Width Channel Router , 1986, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[4]  Alberto L. Sangiovanni-Vincentelli,et al.  Constraint-based channel routing for analog and mixed analog/digital circuits , 1990, 1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers.

[5]  Rob A. Rutenbar,et al.  KOAN/ANAGRAM II: new tools for device-level analog placement and routing , 1991 .

[6]  R. S. Gyurcsik,et al.  A generalized approach to routing mixing analog and digital signal nets in a channel , 1989 .

[7]  Carl Sechen.  Chip-planning, placement, and global routing of macro/custom cell integrated circuits using simulated annealing , 1988, 25th ACM/IEEE, Design Automation Conference.Proceedings 1988..

[8]  Toru Chiba,et al.  An Automatic Routing Scheme for General Cell LSI , 1983, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[9]  Carl Sechen,et al.  Mickey: a macro cell global router , 1991, Proceedings of the European Conference on Design Automation..

[10]  Takao Kaneko,et al.  A routing system for mixed A/D standard cell LSI's , 1990, 1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers.

[11]  J. Litsios,et al.  ILAC: an automated layout tool for analog CMOS circuits , 1988, Proceedings of the IEEE 1988 Custom Integrated Circuits Conference.

[12]  Thomas Lengauer,et al.  Combinatorial algorithms for integrated circuit layout , 1990, Applicable theory in computer science.

[13]  Scott Kirkpatrick,et al.  Global Wiring by Simulated Annealing , 1983, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.