Modeling of dynamic reconfigurable systems with Haskell

With the increasing size and complexity of designs in electronics, new approaches are required for the description and verification of digital circuits, specifically at the system level. Functional HDLs can appear as an advantageous choice for formal verification and high-level descriptions, and this is the focus of this PhD project. We explain how to use high-level description concepts like higher-order functions, polymorphism, and parametrization together with partial evaluation technique, to describe run-time reconfigurable systems in Haskell. We use the CLaSH1 compiler to translate high-level Haskell descriptions into RT level VHDL for a full synthesis tool chain.