A Cmos Electrically Configurable Gate Array

A CMOS electrically configurable gate array that combines the flexibility, efficiency, extendability, and performance of mask-programmed gate arrays with the convenience of user programmability is described. The implementation is facilitated by a novel two-terminal antifuse programmable element and a configurable interconnect technology. The chip has been fabricated using 2- mu m n-well CMOS technology with two-layer metallization. >

[1]  H. Stopper A wafer with electrically programmable interconnections , 1985, 1985 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.

[2]  R. Blumberg,et al.  A 640k Transistor Sea-of-gates 1.2/spl mu/ Micron Hcmos Technology , 1988, 1988 IEEE International Solid-State Circuits Conference, 1988 ISSCC. Digest of Technical Papers.

[3]  Sau Wong,et al.  CMOS erasable programmable logic with zero standby power , 1986, 1986 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.

[4]  J. Pathak,et al.  A 50mhz Cmos Programmable Logic Device , 1988, 1988 IEEE International Solid-State Circuits Conference, 1988 ISSCC. Digest of Technical Papers.

[5]  R. H. Freeman,et al.  A 9000-gate user-programmable gate array , 1988, Proceedings of the IEEE 1988 Custom Integrated Circuits Conference.

[6]  A. El Gamal,et al.  An architecture for electrically configurable gate arrays , 1988, Proceedings of the IEEE 1988 Custom Integrated Circuits Conference.

[7]  E. Hamdy,et al.  Dielectric based antifuse for logic and memory ICs , 1988, Technical Digest., International Electron Devices Meeting.

[8]  K. Ikuzaki,et al.  A 630k Transistor Cmos Gate Array , 1988, 1988 IEEE International Solid-State Circuits Conference, 1988 ISSCC. Digest of Technical Papers.

[9]  S. H. Bowden,et al.  A 9ns Electrically Erasable Cmos Programmable Logic Device , 1988, 1988 IEEE International Solid-State Circuits Conference, 1988 ISSCC. Digest of Technical Papers.

[10]  K. H. Gudger,et al.  A 2500 gate programmable logic device with subdivisable macrocells , 1988, Proceedings of the IEEE 1988 Custom Integrated Circuits Conference.