A stereo audio sigma-delta A/D-converter

A stereo sigma delta A/D-converter for audio applications is presented. In this converter, two identical cascaded fourth-order sigma-delta modulators and a sophisticated multistage linear-phase FIR decimation filter with oversampling ratio of 64 are implemented on the same die. The analog part is designed to operate at a low voltage with a low power consumption. Techniques to achieve simultaneously a high performance and a low power consumption are discussed in details. The minimum stopband attenuation of the decimator is more than 120 dB and the passband ripple of the overall converter is less than 0.0003 dB. The first decimation stage is a special tapped comb filter, whereas the remaining stages are realized without general multipliers by simultaneously implementing all the filter coefficients by using special bit-serial networks. For the integrated overall stereo converter, the power consumption and the signal-to-noise ratio are 180 mW and 97 dB (85 mW and 95 dB) for a 5 V (3 V) power supply. The circuit die area is only 4.7 mm/spl times/5.5 mm using a 1.2 /spl mu/m double-poly BiCMOS process. >

[1]  C. Sidney Burrus,et al.  Multirate filter designs using comb filters , 1984 .

[2]  T. Ritoniemi,et al.  5Th Fifth Order Sigma-Delta Modulator For Audio A/D-Converter , 1991, 1991 Symposium on VLSI Circuits.

[3]  C. Piguet,et al.  On the use of modulo arithmetic comb filters in sigma delta modulators , 1988, ICASSP-88., International Conference on Acoustics, Speech, and Signal Processing.

[4]  J. Haug,et al.  A high-resolution CMOS sigma-delta A/D converter with 320 kHz output rate , 1989, IEEE International Symposium on Circuits and Systems,.

[5]  Hannu Tenhunen,et al.  Fourth order sigma-delta modulator circuit for digital audio and ISDN applications , 1989 .

[6]  Atsushi Iwata,et al.  A 16-bit oversampling A-to-D conversion technology using triple-integration noise shaping , 1987 .

[7]  H.J. De Man,et al.  Adaptive biasing CMOS amplifiers , 1982, IEEE Journal of Solid-State Circuits.

[8]  Koichi Hamashita,et al.  A Stereo 16-Bit Delta-Sigma A/D Converter for Digital Audio , 1989 .

[9]  Rinaldo Castello.  Low-voltage low-power mos switched-capacitor signal-processing techniques , 1984 .

[10]  H. S. Fetterman,et al.  A 14-bit 80-kHz sigma-delta A/D converter: modeling, design and performance evaluation , 1989 .

[11]  W. Sansen,et al.  Novel adaptive biasing amplifier , 1983 .

[12]  E. Hogenauer,et al.  An economical class of digital filters for decimation and interpolation , 1981 .

[13]  M. W. Hauser.  Technology scaling and performance limitations in delta-sigma analog-digital converters , 1990, IEEE International Symposium on Circuits and Systems.

[14]  Klaas Bult,et al.  The CMOS gain-boosting technique , 1991 .

[15]  C.A. Laber,et al.  A family of differential NMOS analog circuits for a PCM codec filter chip , 1982, IEEE Journal of Solid-State Circuits.

[16]  H. Tenhunen,et al.  Efficient VLSI-realizable decimators for sigma-delta analog-to-digital converters , 1988, 1988., IEEE International Symposium on Circuits and Systems.

[17]  Eric A. Vittoz,et al.  Dynamic analog techniques , 1994 .

[18]  T. Saramaki,et al.  Multiplier-free decimator algorithms for superresolution oversampled converters , 1990, IEEE International Symposium on Circuits and Systems.