A write driver for phase change memory based on programming current/voltage

A write driver for PCM is designed to improve reliability and bit yield in the write operation, due to the distributions during the phase change process. And the PCM cell can be injected by current or voltage respectively. Meanwhile, owing to the possible variations of the SET process parameters, the designed circuit can generate either multiple stepdown current pulse or multiple step-down voltage pulse. The circuit is developed based on SMIC 130 nm CMOS standard technology. Compared to the traditional constant current pulse programming, the test results show that the proposed multiple step-down current generator for SET operation can improve the uniformity of resistance and bit yield.

[1]  Kinam Kim,et al.  Enhanced write performance of a 64 Mb phase-change random access memory , 2005, ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005..

[2]  Yuan Xie,et al.  Energy and performance driven circuit design for emerging Phase-Change Memory , 2010, 2010 15th Asia and South Pacific Design Automation Conference (ASP-DAC).

[3]  Tong Zhang,et al.  Exploratory study on circuit and architecture design of very high density diode-switch phase change memories , 2009, 2009 10th International Symposium on Quality Electronic Design.

[4]  Roberto Bez,et al.  Program circuit for a phase change memory array with 2 MB/s write throughput for embedded applications , 2008, ESSCIRC 2008 - 34th European Solid-State Circuits Conference.

[5]  Byung-Gil Choi,et al.  A 0.1-$\mu{\hbox {m}}$ 1.8-V 256-Mb Phase-Change Random Access Memory (PRAM) With 66-MHz Synchronous Burst-Read Operation , 2007, IEEE Journal of Solid-State Circuits.