A General Purpose SKM-I1 Image Processor

This paper presents a new version of the sliding memory plane image processor (SliM-11) which integrates a linear array of sixty-four 8-bit processing elements (PES) on a single chip. In contrast to existing SIMD array processors, each PE has a multiplier that is quite effective for correlation, convolution, template matching, etc. The instruction set can execute an ALWmultiplier operation, a parallel move operation, an inter-PE communication operation, and a data 110 operation simultaneously in an instruction cycle. Moreover, SliM-I1 has special features, such as an adder tree for histogramming, a sum-or tree for program control, etc. SliM-I1 operates at 30 MHz in the worst case simulation, and thus, gives at least 1.92 GIPS. The total number of transistors is about 1.5 millions, the core size is 13.2 X 13.0 mm2 and the package vpe is 208 pin PQ2.

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