Specification and Synthesis of Complex Arithmetic Operators for FPGAs
暂无分享,去创建一个
This paper describes the application of the experimental system LORTGEN for the technology-specific specification and synthesis of high performance arithmetic operators for FPGAs. Using multiplier and adder designs for the XC3xxx-LCA-family as example we demonstrate that the implemented architecture-specific techniques boost the performance and density of the designs. Consequently, LORTGEN enables the implementation of complex operators (e.g. multipliers) in one FPGA, frees the designers from device-specific implementation details and allows them to focus more on actually designing the application.
[1] P. Schlegel,et al. Accelerated fuzzy pattern classification with ASICs , 1993, Sixth Annual IEEE International ASIC Conference and Exhibit.
[2] Norbert Wehn,et al. Synthesis of complex VHDL operators , 1993, Proceedings of EURO-DAC 93 and EURO-VHDL 93- European Design Automation Conference.
[3] Robert K. Brayton,et al. MIS: A Multiple-Level Logic Optimization System , 1987, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.