DRedSOP: Synthesis of a New Class of Regular Functions

In this paper we characterize and study a new class of regular Boolean functions called D-reducible. A D-reducible function, depending on all its n input variables, can be studied and synthesized in a space of dimension strictly smaller than n. A D-reducible function can be efficiently decomposed, giving rise to a new logic form, that we have called DRedSOP. This form is often smaller than the corresponding minimum SOP form. Experimental evidence shows that such functions are rather common and D-reducibility can be tested very quickly

[1]  Fabio Somenzi,et al.  Logic synthesis and verification algorithms , 1996 .

[2]  Tsutomu Sasao.  A Design Method for AND-OR-EXOR Three-Level Networks , 1995 .

[3]  Fabrizio Luccio,et al.  Three-level logic minimization based on function regularities , 2003, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[4]  Tsutomu Sasao,et al.  An optimization of AND-OR-EXOR three-level networks , 1997, Proceedings of ASP-DAC '97: Asia and South Pacific Design Automation Conference.

[5]  Valentina Ciriani.  Synthesis of SPP three-level logic networks using affine spaces , 2003, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[6]  N. Hendrich,et al.  Minimization of Parity-checked Fault-secure And/exor Networks , 1993 .

[7]  Elena Dubrova,et al.  AOXMIN-MV: A Heuristic Algorithm for AND-OR-XOR Minimization , 1999 .

[8]  Tsutomu Sasao,et al.  Minimization of AND-OR-EXOR Three-Level Networks with AND Gate Sharing (Special Issue on Synthesis and Verification of Hardware Design) , 1997 .

[9]  Tsutomu Sasao,et al.  A heuristic algorithm to design AND-OR-EXOR three-level networks , 1998, Proceedings of 1998 Asia and South Pacific Design Automation Conference.

[10]  Tsutomu Sasao,et al.  Switching Theory for Logic Synthesis , 1999, Springer US.

[11]  S. Yang,et al.  Logic Synthesis and Optimization Benchmarks User Guide Version 3.0 , 1991 .

[12]  Olivier Coudert,et al.  Doing two-level logic minimization 100 times faster , 1995, SODA '95.

[13]  D. M. Miller,et al.  Upper bound on number of products in AND-OR-XOR expansion of logic functions , 1995 .

[14]  Fabrizio Luccio,et al.  On a New Boolean Function with Applications , 1999, IEEE Trans. Computers.

[15]  Giuseppe Caruso.  Near optimal factorization of Boolean functions , 1991, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[16]  Marek A. PerkowskiDepartment.  A New Representation of Strongly Unspeciied Switching Functions and Its Application to Multi-level And/or/exor Synthesis , 1995 .