A study of reliability issues in clock distribution networks

In this paper, we present a reliability study of clock mesh distribution networks. We analyze the electromigration (EM) phenomena and demonstrate their occurrence in clock mesh networks (CMN). Due to shrinking feature sizes in more advanced technologies, EM is becoming a more prominent reliability issue. Process variation, power supply noise, and clock gating are some of the factors that can increase electromigration in the clock mesh. We identity the potential EM branches by investigating current flows under various conditions. Our study shows that a clock mesh optimized for certain configurations of clock sinks may experience electromigration due to asymmetrical bidirectional currents flowing in some grid segments.

[1]  Yangyuan Wang,et al.  Numerical calculation of electromigration under pulse current with Joule heating , 1999 .

[2]  David Overhauser,et al.  Full-chip reliability analysis , 1998 .

[3]  Chee Lip Gan,et al.  Joule heating-assisted electromigration failure mechanisms for dual damascene Cu/SiO/sub 2/ interconnects , 2003, Proceedings of the 10th International Symposium on the Physical and Failure Analysis of Integrated Circuits. IPFA 2003.

[4]  S. Nassif,et al.  Developing and Integrating TCAD Applications with the Semiconductor Wafer Representation , 1992, NUPAD IV. Workshop on Numerical Modeling of Processes and Devices for Integrated Circuits,.

[5]  Sachin S. Sapatnekar,et al.  Hybrid structured clock network construction , 2001, IEEE/ACM International Conference on Computer Aided Design. ICCAD 2001. IEEE/ACM Digest of Technical Papers (Cat. No.01CH37281).

[6]  Sani R. Nassif,et al.  Models of process variations in device and interconnect , 2000 .

[7]  David Blaauw,et al.  Static electromigration analysis for on-chip signal interconnects , 2003, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[8]  Rajeev Murgai,et al.  Clock distribution architectures: a comparative study , 2006, 7th International Symposium on Quality Electronic Design (ISQED'06).

[9]  Jiang Hu,et al.  Combinatorial Algorithms for Fast Clock Mesh Optimization , 2006, 2006 IEEE/ACM International Conference on Computer Aided Design.

[10]  I. Blech Electromigration in thin aluminum films on titanium nitride , 1976 .

[11]  Chenming Hu,et al.  Modeling electromigration lifetime under bidirectional current stress , 1995, IEEE Electron Device Letters.

[12]  David Overhauser,et al.  Full-chip reliability analysis , 1998, 1998 IEEE International Reliability Physics Symposium Proceedings. 36th Annual (Cat. No.98CH36173).

[13]  J. Maiz Characterization of electromigration under bidirectional (BC) and pulsed unidirectional (PDC) currents , 1989 .

[14]  K.A. Jenkins,et al.  A clock distribution network for microprocessors , 2000, 2000 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.00CH37103).

[15]  Frank Liu,et al.  Efficient computation of current flow in signal wires for reliability analysis , 2007, 2007 IEEE/ACM International Conference on Computer-Aided Design.