论文信息 - An Approach to Reducing Verification Complexity of Real-Time Embedded Systems - 字舞流文

An Approach to Reducing Verification Complexity of Real-Time Embedded Systems

We present an approach to the formal verification of real-time embedded systems by using model checking. We address the verification of systems modeled in a timed Petri net representation and intro ...

Petru Eles | Zebo Peng | Luis-Alejandro Cortes

[1] Javier Esparza,et al. A polynomial algorithm to compute the concurrency relation of free-choice Signal Transition Graphs , 1995 .

[2] David S. Johnson,et al. Computers and Intractability: A Guide to the Theory of NP-Completeness , 1978 .

[3] Daniel Br. New Methods to Color the Vertices of a Graph , 1979 .

[4] Jens Palsberg,et al. Complexity Results for 1-Safe Nets , 1993, Theor. Comput. Sci..

[5] Petru Eles,et al. Verification of embedded systems using a petri net based representation , 2000, ISSS '00.

[6] Daniel Brélaz,et al. New methods to color the vertices of a graph , 1979, CACM.

[7] Jeffrey D. Ullman,et al. Introduction to Automata Theory, Languages and Computation , 1979 .

[8] Javier Esparza,et al. Model Checking Using Net Unfoldings , 1993, Sci. Comput. Program..

[9] Petru Eles,et al. Verification of Real-Time Embedded Systems using Petri Net Models and Timed Automata , 2002 .