M2CA: Modular Memristive Crossbar Arrays

The memristor crossbar array architecture can find a wide range of applications in the design of neuromorphic computing systems. The scalability of the arrays is important to extend the use in complex cognitive tasks. However, the creation of large-sized arrays is limited by a sneak-path problem reducing noise margins and accuracy. In this paper, we perform a large scale analysis of a sneak path problem in crossbar arrays using HSPICE simulation models. This allows for developing a realistic mathematical model for simulating large scale crossbar arrays. The performance analysis and impact of sneak paths for neural network implemented on a crossbar array is tested using the MNIST character recognition database. Also, in this work we provide a possible solution to suppress the influence of the sneak path current on the network. The suppressing effect is achieved by dividing a large memristive crossbar array into smaller arrays. These crossbars are simulated in HSPICE as well, examined and compared to the originally constructed crossbar.

[1]  S. Raoux.  Phase Change Materials , 2009 .

[2]  P. Vontobel,et al.  Writing to and reading from a nano-scale crossbar memory based on memristors , 2009, Nanotechnology.

[3]  Eitan Yaakobi,et al.  Sneak-path constraints in memristor crossbar arrays , 2013, 2013 IEEE International Symposium on Information Theory.

[4]  Yukihiro Kaneko,et al.  Neural network based on a three-terminal ferroelectric memristor to enable on-chip pattern recognition , 2013, 2013 Symposium on VLSI Technology.

[5]  Alex Pappachen James,et al.  HTM Spatial Pooler With Memristor Crossbar Circuits for Sparse Biometric Recognition , 2017, IEEE Transactions on Biomedical Circuits and Systems.

[6]  Y.C. Chen,et al.  Write Strategies for 2 and 4-bit Multi-Level Phase-Change Memory , 2007, 2007 IEEE International Electron Devices Meeting.

[7]  Alex Pappachen James,et al.  A Survey of Memristive Threshold Logic Circuits , 2016, IEEE Transactions on Neural Networks and Learning Systems.

[8]  Rainer Waser,et al.  Complementary resistive switches for passive nanocrossbar memories. , 2010, Nature materials.

[9]  Byoungil Lee,et al.  Nanoelectronic programmable synapses based on phase change materials for brain-inspired computing. , 2012, Nano letters.

[10]  Wei Wang,et al.  Design considerations for variation tolerant multilevel CMOS/Nano memristor memory , 2010, GLSVLSI '10.

[11]  Khaled N. Salama,et al.  Memristor-based memory: The sneak paths problem and solutions , 2013, Microelectron. J..

[12]  T. Serrano-Gotarredona,et al.  A Proposal for Hybrid Memristor-CMOS Spiking Neuromorphic Learning Systems , 2013, IEEE Circuits and Systems Magazine.

[13]  Kyungmin Kim,et al.  Memristor Applications for Programmable Analog ICs , 2011, IEEE Transactions on Nanotechnology.

[14]  Blaise Mouttet,et al.  Proposal for Memristors in Signal Processing , 2008, NanoNet.