off-State Degradation in Drain-Extended NMOS Transistors: Interface Damage and Correlation to Dielectric Breakdown

Off-state degradation in drain-extended NMOS transistors is studied. Carefully designed experiments and well-calibrated simulations show that hot carriers, which are generated by impact ionization of surface band-to-band tunneling current, are responsible for interface damage during off-state stress. Classical on-state hot carrier degradation has historically been associated with broken equivSi-H bonds at the interface. In contrast, the off-state degradation in drain-extended devices is shown to be due to broken equivSi-O- bonds. The resultant degradation is universal, which enables a long-term extrapolation of device degradation at operating bias conditions based on short-term stress data. Time evolution of degradation due to broken equivSi-O- bonds and the resultant universal behavior is explained by a bond-dispersion model. Finally, we show that, under off-state stress conditions, the interface damage that is measured by charge-pumping technique is correlated with dielectric breakdown time, as both of them are driven by broken equivSi-O- bonds.

[1]  Karl Hess,et al.  Simulation of Si-SiO/sub 2/ defect generation in CMOS chips: from atomistic structure to chip failure rates , 2000, International Electron Devices Meeting 2000. Technical Digest. IEDM (Cat. No.00CH37138).

[2]  M.A. Alam,et al.  Universality of Off-State Degradation in Drain Extended NMOS Transistors , 2006, 2006 International Electron Devices Meeting.

[3]  K. Mistry,et al.  How do hot carriers degrade n-channel MOSFETs? , 1995 .

[4]  J. David,et al.  Temperature Dependence of Impact Ionization in Submicrometer Silicon Devices , 2006, IEEE Transactions on Electron Devices.

[5]  R. Degraeve,et al.  Observation of hot-carrier-induced nFET gate-oxide breakdown in dynamically stressed CMOS circuits , 2002, Digest. International Electron Devices Meeting,.

[6]  G. Dorda,et al.  Generation of interface states by hot hole injection in MOSFET's , 1982, IEEE Transactions on Electron Devices.

[7]  H. Kufluoglu,et al.  A geometrical unification of the theories of NBTI and HCI time-exponents and its implications for ultra-scaled planar and surround-gate MOSFETs , 2004, IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004..

[8]  E. Nowak,et al.  Off-state mode TDDB reliability for ultra-thin gate oxides: New methodology and the impact of oxide thickness scaling , 2004, 2004 IEEE International Reliability Physics Symposium. Proceedings.

[9]  S. Mahapatra,et al.  On the generation and recovery of interface traps in MOSFETs subjected to NBTI, FN, and HCI stress , 2006, IEEE Transactions on Electron Devices.

[10]  Wai Kin Chim,et al.  Extraction of metal-oxide-semiconductor field-effect-transistor interface state and trapped charge spatial distributions using a physics-based algorithm , 1997 .

[11]  Chenming Hu,et al.  Hot-electron-induced photon and photocarrier generation in Silicon MOSFET's , 1984, IEEE Transactions on Electron Devices.

[12]  E. Takeda,et al.  An empirical model for device degradation due to hot-carrier injection , 1983, IEEE Electron Device Letters.

[13]  P.J. Silverman,et al.  Explanation of stress-induced damage in thin oxides , 1998, International Electron Devices Meeting 1998. Technical Digest (Cat. No.98CH36217).

[14]  Zhijian Xie,et al.  High power silicon RF LDMOSFET technology for 2.1GHz power amplifier applications , 2003, ISPSD 2003.

[15]  Kazutoshi Nakamura,et al.  Complementary 25 V LDMOS for analog applications based on 0.6 /spl mu/m BiCMOS technology , 2000, Proceedings of the 2000 BIPOLAR/BiCMOS Circuits and Technology Meeting (Cat. No.00CH37124).

[16]  Muhammad A. Alam,et al.  SILC as a measure of trap generation and predictor of T/sub BD/ in ultrathin oxides , 2002 .

[17]  K. Tatsuuma,et al.  A drain avalanche hot carrier lifetime model for n- and p-channel MOSFETs , 2004, IEEE Transactions on Device and Materials Reliability.

[18]  C. Hu,et al.  Lucky-electron model of channel hot-electron injection in MOSFET'S , 1984 .

[19]  Taylor R. Efland,et al.  High-voltage drain extended MOS transistors for 0.18-/spl mu/m logic CMOS process , 2001 .

[20]  D. Ang,et al.  A unified model for the self-limiting hot-carrier degradation in LDD n-MOSFETs , 1998 .

[21]  R. K. Smith,et al.  Monte Carlo simulation of the CHISEL flash memory cell , 2000 .

[22]  S. Mittl,et al.  Accelerated gate-oxide breakdown in mixed-voltage I/O circuits , 1997, 1997 IEEE International Reliability Physics Symposium Proceedings. 35th Annual.

[23]  H. Fu,et al.  Self-Limiting Behavior of Hot Carrier Degradation and Its Implication on the Validity of Lifetime Extraction by Accelerated Stress , 1987, 25th International Reliability Physics Symposium.

[24]  Chenming Hu,et al.  Hot-Electron-Induced MOSFET Degradation - Model, Monitor, and Improvement , 1985, IEEE Journal of Solid-State Circuits.

[25]  Muhammad Ashraful Alam SILC as a Measure of Trap Generation and Predictor of in Ultrathin Oxides , 2002 .

[26]  Guido Groeseneken,et al.  Degradation and breakdown in thin oxide layers: mechanisms, models and reliability prediction , 1999 .

[27]  Yuhao Luo,et al.  Oxide reliability of drain engineered I/O NMOS from hot carrier injection , 2003, IEEE Electron Device Letters.

[28]  M. Deen,et al.  Features and mechanisms of the saturating hot-carrier degradation in LDD NMOSFETs , 1996 .

[29]  M.A. Alam,et al.  Hole energy dependent interface trap generation in MOSFET Si/SiO/sub 2/ interface , 2005, IEEE Electron Device Letters.

[30]  Chenming Hu Hot-electron effects in MOSFETs , 1983, 1983 International Electron Devices Meeting.