Improving Arbitration and Buffer Management Techniques for Self Similar Cubic Network

The development of modern computer architectures focuses on integrating more and more processing cores into a single chip to extend the system throughput and data processing capability. The performance of on-chip network that communicates processing cores dominates the overall system performance. Hence we proposed a novel on-chip-network, Self Similar Cubic (SSC), for the many-core architecture. SSC network has the capabilities of good scalability and high throughput. This paper aims to develop several techniques to enhance the throughput of SSC network switch. The performance of SSC network can be improved accordingly. The experimental results reveal that the proposed mechanisms can reduce the execution time of the packets among the variant workloads.