Three-dimensional simulation of a floating-gate EPROM cell

Increasing chip density makes the influence of three-dimensional effects in VLSI devices more noticeable. The authors present a prototypal three-dimensional device simulator, which allows for accurate modelling of such effects. It adopts a prismatic-element discretization technique that makes the mesh generation easier without introducing excessively severe geometrical limitations. Among the peculiar features of the program is the capability of managing appropriate boundary conditions for floating gates (i.e. charge-boundary conditions). As a test application, the simulation of a floating-gate EPROM cell is compared with a two-dimensional simulation, with good results. Some details about the implementation of the code on a Cray supercomputer are given, and the program performance in a vector environment is discussed.<<ETX>>