An improved configurable 2-D linear feedback shift register for embedded core built-in self-test
暂无分享,去创建一个
[1] Srinivasa Vemuru,et al. Built-In Self-Test Circuit Optimization for Embedded Cores , 2010, CDES.
[2] Hareesh Khattri,et al. Multiple-output low-power linear feedback shift register design , 2006, IEEE Transactions on Circuits and Systems I: Regular Papers.
[3] Xinhui Zhang,et al. Structure Design and Optimization of 2-D LFSR-Based Multisequence Test Generator in Built-In Self-Test , 2008, IEEE Transactions on Instrumentation and Measurement.
[4] D.P. Siewiorek,et al. Testing of digital systems , 1981, Proceedings of the IEEE.
[5] Chien-In Henry Chen. Synthesis of configurable linear feedback shifter registers for detecting random-pattern-resistant faults , 2001, International Symposium on System Synthesis (IEEE Cat. No.01EX526).
[6] Bashir M. Al-Hashimi,et al. Dual multiple-polynomial LFSR for low-power mixed-mode BIST , 2003 .
[7] Kiran George,et al. Configurable two-dimensional linear feedback shifter registers for parallel and serial built-in self-test , 2004, IEEE Transactions on Instrumentation and Measurement.
[8] Krishnendu Chakrabarty,et al. Deterministic built-in test pattern generation for high-performance circuits using twisted-ring counters , 2000, IEEE Trans. Very Large Scale Integr. Syst..