Modeling of multilevel structures: a general method for analyzing stress evolution during processing
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[1] J. Lau,et al. Thermal-stress analysis of SOIC packages and interconnections , 1988, 38th Electronics Components Conference 1988., Proceedings..
[2] Walter H. Schroen,et al. Stress Related Failures Causing Open Metallization , 1987, IEEE International Reliability Physics Symposium.
[3] J. Lau,et al. Elastoplastic Analysis of Surface-Mount Solder Joints , 1987 .
[4] Tin-Lup Wong,et al. Fracture of Glass Seals in Surface Mount IC Packages , 1990 .
[5] W. T. Chen,et al. Optimization of interconnections between packaging levels , 1984 .
[6] John Hon Shing Lau,et al. Mechanical Behavior of Microstrip Structures Made from YBa 2 Cu 3 O 7-x Superconducting Ceramics , 1988 .
[7] J. Erich,et al. The Effect of Joint Design on the Thermal Fatigue Life of Leadless Chip Carrier Solder Joints , 1985 .
[8] P. A. Engel,et al. Stress analysis in electronic packaging , 1988 .
[9] Y. Kasem,et al. Horizontal Die Cracking as a Yield and Reliability Problem in Integrated Circuit Devices , 1987 .
[10] J. Lau,et al. Finite Element Modeling for Optimizing Hermetic Package Reliability , 1989 .
[11] Arnold Reisman,et al. Thermal stress analysis of a multichip package design , 1989 .
[12] Robert E. Jones,et al. Stress analysis of encapsulated fine‐line aluminum interconnect , 1987 .