A high sensitivity process variation sensor utilizing sub-threshold operation
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[1] James Tschanz,et al. Parameter variations and impact on circuits and microarchitecture , 2003, Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451).
[2] S.D. Sudhoff,et al. Evolutionary Design of Electromagnetic and Electromechanical Devices , 2007, 2007 IEEE Electric Ship Technologies Symposium.
[3] Kaushik Roy,et al. Statistical Characterization and On-Chip Measurement Methods for Local Random Variability of a Process Using Sense-Amplifier-Based Test Structure , 2007, 2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.
[4] S.D. Sudhoff,et al. Analytical Design Model for Surface-Mounted Permanent-Magnet Synchronous Machines , 2009, IEEE Transactions on Energy Conversion.
[5] Saibal Mukhopadhyay,et al. Leakage current mechanisms and leakage reduction techniques in deep-submicrometer CMOS circuits , 2003, Proc. IEEE.
[6] Scott D. Sudhoff. Waveform reconstruction from the average-value model of line-commutated converter-synchronous machine systems , 1993 .
[7] M. Ketchen,et al. Ring oscillator based technique for measuring variability statistics , 2006, 2006 IEEE International Conference on Microelectronic Test Structures.
[8] S.D. Sudhoff,et al. Genetic Algorithm Based Design of a Permanent Magnet Synchronous Machine , 2005, IEEE International Conference on Electric Machines and Drives, 2005..
[9] Keith A. Jenkins,et al. A Completely Digital On-Chip Circuit for Local-Random-Variability Measurement , 2008, 2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers.
[10] Joshua M Williams,et al. Incorporating Motion in Mesh-Based Magnetic Equivalent Circuits , 2010, IEEE Transactions on Energy Conversion.
[11] Keith A. Bowman,et al. Measurements and modeling of intrinsic fluctuations in MOSFET threshold voltage , 2005, ISLPED '05. Proceedings of the 2005 International Symposium on Low Power Electronics and Design, 2005..
[12] Kaushik Roy,et al. Self calibrating circuit design for variation tolerant VLSI systems , 2005, 11th IEEE International On-Line Testing Symposium.
[13] Scott D. Sudhoff,et al. Analysis of Electric Machinery and Drive Systems , 1995 .
[14] William J. Bowhill,et al. Design of High-Performance Microprocessor Circuits , 2001 .
[15] J. Plusquellic,et al. A test structure for characterizing local device mismatches , 2006, 2006 Symposium on VLSI Circuits, 2006. Digest of Technical Papers..
[16] Anantha Chandrakasan,et al. A Test-Structure to Efficiently Study Threshold-Voltage Variation in Large MOSFET Arrays , 2007, 8th International Symposium on Quality Electronic Design (ISQED'07).
[17] N. Azizi,et al. Compensation for within-die variations in dynamic logic by using body-bias , 2005, The 3rd International IEEE-NEWCAS Conference, 2005..
[18] Carlos Galup-Montoro,et al. Characterization of MOS transistor current mismatch , 2004, Proceedings. SBCCI 2004. 17th Symposium on Integrated Circuits and Systems Design (IEEE Cat. No.04TH8784).
[19] James D. Meindl,et al. Impact of die-to-die and within-die parameter fluctuations on the maximum clock frequency distribution for gigascale integration , 2002, IEEE J. Solid State Circuits.
[20] Vivek De,et al. Adaptive body bias for reducing impacts of die-to-die and within-die parameter variations on microprocessor frequency and leakage , 2002, 2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315).