Trends in tests and failure mechanisms in deep sub-micron technologies
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[1] David Blaauw,et al. Statistical timing analysis using bounds and selective enumeration , 2003, TAU '02.
[2] F. Caignet,et al. The challenge of signal integrity in deep-submicrometer CMOS technology , 2001, Proc. IEEE.
[3] Said Hamdioui,et al. The state-of-art and future trends in testing embedded memories , 2004 .
[4] Mehrdad Nourani,et al. Built-in self-test for signal integrity , 2001, Proceedings of the 38th Design Automation Conference (IEEE Cat. No.01CH37232).
[5] Reinaldo A. Bergamaschi,et al. The A to Z of SoCs , 2002, ICCAD 2002.
[6] Salem Abdennadher,et al. Challenges in High Speed Interface Testing , 2005, 14th Asian Test Symposium (ATS'05).
[7] David Abercrombie,et al. Value-added defect testing techniques , 2005, IEEE Design & Test of Computers.
[8] Joel S. Emer,et al. The soft error problem: an architectural perspective , 2005, 11th International Symposium on High-Performance Computer Architecture.
[9] Sandip Kundu,et al. Trends in manufacturing test methods and their implications , 2004 .
[10] Josef Schmid,et al. Advanced synchronous scan test methodology for multi clock domain ASICs , 1999, Proceedings 17th IEEE VLSI Test Symposium (Cat. No.PR00146).
[11] Camelia Hora,et al. Trends in testing integrated circuits , 2004, 2004 International Conferce on Test.
[12] Said Hamdioui,et al. Framework for fault analysis and test generation in DRAMs , 2005, Design, Automation and Test in Europe.
[13] Puneet Gupta,et al. Design sensitivities to variability: extrapolations and assessments in nanometer VLSI , 2002, 15th Annual IEEE International ASIC/SOC Conference.
[14] Nur A. Touba,et al. Reducing test data volume using external/LBIST hybrid test patterns , 2000, Proceedings International Test Conference 2000 (IEEE Cat. No.00CH37159).
[15] Erik Jan Marinissen,et al. Trends in testing integrated circuits , 2004 .
[16] Alfred L. Crouch. Future trends in test: the adoption and use of low cost structural testers , 2004, 2004 International Conferce on Test.
[17] Lorenzo Alvisi,et al. Modeling the effect of technology trends on the soft error rate of combinational logic , 2002, Proceedings International Conference on Dependable Systems and Networks.