Future of Strained Si/Semiconductors in Nanoscale MOSFETs

The maximum electron and hole mobility enhancement for uniaxial process-induced strained silicon is modeled and experimentally measured using a flexure based 4-point wafer bending jig. The highest known uniaxial stress to date is introduced into the channel of MOSFETs (applied mechanical stress of ~1.0GPa on samples with initial process stress of 1GPa for a total channel stress of ~2Pa). The maximum mobility enhancement from uniaxial stress is found to be greater than ~4.0 and ~1.7 times for holes and electrons, respectively. The physics behind the strain enhanced mobility is explained and future cases of technological importance to the industry are investigated

[1]  M. Fischetti.  Monte Carlo simulation of transport in technologically significant semiconductors of the diamond and zinc-blende structures. I. Homogeneous transport , 1991 .

[2]  J. Welser,et al.  Comparative study of phonon‐limited mobility of two‐dimensional electrons in strained and unstrained Si metal–oxide–semiconductor field‐effect transistors , 1996 .

[3]  Mark E. Law,et al.  Continuum based modeling of silicon integrated circuit processing: An object oriented approach , 1998 .

[4]  D. Antoniadis,et al.  Carrier mobilities and process stability of strained Si n- and p-MOSFETs on SiGe virtual substrates , 2001 .

[5]  M. Lundstrom,et al.  Essential physics of carrier transport in nanoscale MOSFETs , 2002 .

[6]  P. Solomon,et al.  Six-band k⋅p calculation of the hole mobility in silicon inversion layers: Dependence on surface orientation, strain, and silicon thickness , 2003 .

[7]  M. Jurczak,et al.  Exploring the limits of stress-enhanced hole mobility , 2005, IEEE Electron Device Letters.

[8]  S. Thompson,et al.  Uniaxial-process-induced strained-Si: extending the CMOS roadmap , 2006, IEEE Transactions on Electron Devices.

[9]  R. Wise,et al.  Fundamentals of silicon material properties for successful exploitation of strain engineering in modern CMOS manufacturing , 2006, IEEE Transactions on Electron Devices.

[10]  Masumi Saitoh,et al.  Emerging nanoscale silicon devices taking advantage of nanostructure physics , 2006, IBM J. Res. Dev..

[11]  V. Moroz,et al.  pMOSFET with 200% mobility enhancement induced by multiple stressors , 2006, IEEE Electron Device Letters.