An Intrinsically Linear Wideband Polar Digital Power Amplifier
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Morteza S. Alavi | Mohsen Hashemi | Leo C. N. de Vreede | Yiyu Shen | Mohammadreza Mehrpoo | L. D. de Vreede | M. Mehrpoo | M. Hashemi | Yiyu Shen | M. Alavi
[1] Yanjie Wang,et al. A Highly Linear Dual-Band Mixed-Mode Polar Power Amplifier in CMOS with An Ultra-Compact Output Network , 2016, IEEE Journal of Solid-State Circuits.
[2] G. Ewing,et al. High-efficiency radio-frequency power amplifiers , 1964 .
[3] Franziska Hoffmann,et al. Design Of Analog Cmos Integrated Circuits , 2016 .
[4] Stefano Pellerano,et al. 13.8 A 24dBm 2-to-4.3GHz wideband digital Power Amplifier with built-in AM-PM distortion self-compensation , 2017, 2017 IEEE International Solid-State Circuits Conference (ISSCC).
[5] Fu-Lung Hsueh,et al. A Fully Integrated Bluetooth Low-Energy Transmitter in 28 nm CMOS With 36% System Efficiency at 3 dBm , 2016, IEEE Journal of Solid-State Circuits.
[6] Nathan O. Sokal,et al. Class of High-Efficiency Tuned Switching Power Amplifiers , 2009 .
[7] Jeffrey S. Walling,et al. A Quadrature Switched Capacitor Power Amplifier , 2016, IEEE Journal of Solid-State Circuits.
[8] Robert Bogdan Staszewski,et al. A Wideband 2$\times$ 13-bit All-Digital I/Q RF-DAC , 2014, IEEE Transactions on Microwave Theory and Techniques.
[9] S. M. Alavi,et al. All-Digital I/Q RF-DAC , 2014 .
[10] S.-A. El-Hamamsy,et al. Design of high-efficiency RF Class-D power amplifier , 1994 .
[11] René van Leuken,et al. 17.5 An intrinsically linear wideband digital polar PA featuring AM-AM and AM-PM corrections through nonlinear sizing, overdrive-voltage control, and multiphase RF clocking , 2017, 2017 IEEE International Solid-State Circuits Conference (ISSCC).
[12] Voravit Vorapipat,et al. A Class-G Voltage-Mode Doherty Power Amplifier , 2017, IEEE Journal of Solid-State Circuits.
[13] F. Raab. Class-E, Class-C, and Class-F power amplifiers based upon a finite number of harmonics , 2001 .
[14] Bruce A. Wooley,et al. A Digitally Modulated Polar CMOS Power Amplifier With a 20-MHz Channel Bandwidth , 2008, IEEE J. Solid State Circuits.
[15] Amirpouya Kavousian,et al. A Digitally Modulated Polar CMOS Power Amplifier With a 20-MHz Channel Bandwidth , 2008, IEEE Journal of Solid-State Circuits.
[16] Jan Craninckx,et al. An Incremental-Charge-Based Digital Transmitter With Built-in Filtering , 2015, IEEE Journal of Solid-State Circuits.
[17] A. Scuderi,et al. A 25 dBm Digitally Modulated CMOS Power Amplifier for WCDMA/EDGE/OFDM With Adaptive Digital Predistortion and Efficient Power Control , 2009, IEEE Journal of Solid-State Circuits.
[18] Chao Lu,et al. A 24.7dBm all-digital RF transmitter for multimode broadband applications in 40nm CMOS , 2013, 2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers.
[19] S. C. Cripps,et al. RF Power Amplifiers for Wireless Communications , 1999 .
[20] Ali M. Niknejad,et al. Design Considerations for a Direct Digitally Modulated WLAN Transmitter With Integrated Phase Path and Dynamic Impedance Modulation , 2013, IEEE Journal of Solid-State Circuits.
[21] K. Muhammad,et al. All-digital PLL and transmitter for mobile phones , 2005, IEEE Journal of Solid-State Circuits.
[22] P. Asbeck,et al. Current mode class-D power amplifiers for high efficiency RF applications , 2001, 2001 IEEE MTT-S International Microwave Sympsoium Digest (Cat. No.01CH37157).
[23] Hua Wang,et al. 9.5 A dual-band digital-WiFi 802.11a/b/g/n transmitter SoC with digital I/Q combining and diamond profile mapping for compact die area and improved efficiency in 40nm CMOS , 2016, 2016 IEEE International Solid-State Circuits Conference (ISSCC).
[24] Susan Luschas,et al. Radio frequency digital-to-analog converter , 2004, IEEE Journal of Solid-State Circuits.
[25] M. Maymandi-Nejad,et al. A monotonic digitally controlled delay element , 2005, IEEE Journal of Solid-State Circuits.
[26] Paul T. M. van Zeijl,et al. A Digital Envelope Modulator for a WLAN OFDM Polar Transmitter in 90 nm CMOS , 2007, IEEE Journal of Solid-State Circuits.
[27] Anne-Johan Annema,et al. Analytical Design Equations for Class-E Power Amplifiers , 2007, IEEE Transactions on Circuits and Systems I: Regular Papers.
[28] K. Bult,et al. A 10-b, 500-MSample/s CMOS DAC in 0.6 mm2 , 1998, IEEE J. Solid State Circuits.
[29] Ali Hajimiri,et al. The class-E/F family of ZVS switching amplifiers , 2003 .
[30] Peter M. Asbeck,et al. 2.8 A Class-G voltage-mode Doherty power amplifier , 2017, 2017 IEEE International Solid-State Circuits Conference (ISSCC).
[31] Ali M. Niknejad,et al. An Efficient Mixed-Signal 2.4-GHz Polar Power Amplifier in 65-nm CMOS Technology , 2011, IEEE Journal of Solid-State Circuits.
[32] Howard C. Luong,et al. A WCDMA/WLAN Digital Polar Transmitter With Low-Noise ADPLL, Wideband PM/AM Modulator, and Linearized PA , 2015, IEEE Journal of Solid-State Circuits.
[33] Kathleen Philips,et al. A 1.3 nJ/b IEEE 802.11ah Fully-Digital Polar Transmitter for IoT Applications , 2016, IEEE Journal of Solid-State Circuits.
[34] Li Lin,et al. 13.7 A 0.23mm2 digital power amplifier with hybrid time/amplitude control achieving 22.5dBm at 28% PAE for 802.11g , 2017, 2017 IEEE International Solid-State Circuits Conference (ISSCC).