Models for subthreshold and above-threshold currents in 0.1-/spl mu/m pocket n-MOSFETs for low-voltage applications

We present a model for subthreshold current in deep-submicrometer pocket n-MOSFETs based on the diffusion current transport equation, the quasi-two-dimensional (2-D) Poisson equation and a doping-density-dependent mobility model, and a model for above-threshold current in deep-submicrometer pocket n-MOSFETs based on the drift-diffusion current transport equation for nonuniformly doped MOSFETs, the charge-sheet approximation, a solution of the one-dimensional (1-D) Poisson equation, a quasi-2-D model for the velocity saturation region, longitudinal- and transverse-field-dependent mobility models. The analytic models for subthreshold and above-threshold currents are used to efficiently construct viable design spaces locating well-designed 0.1-/spl mu/m pocket n-MOSFETs that meet all the device design specifications of off-state (leakage) current, on-state (drive) current, and power-supply voltage. The model for subthreshold current correctly predicts an increase in off-state current in sub-100 nm pocket n-MOSFETs. The model for above-threshold current generates I/sub D/-V/sub DS/ characteristics of a variety of deep-submicrometer pocket n-MOSFETs.

[1]  A. Tasch,et al.  A computationally efficient model for inversion layer quantization effects in deep submicron N-channel MOSFETs , 1996 .

[2]  Chenming Hu,et al.  Modeling of pocket implanted MOSFETs for anomalous analog behavior , 1999, International Electron Devices Meeting 1999. Technical Digest (Cat. No.99CH36318).

[3]  Christine M. Maziar,et al.  Physically-based models for effective mobility and local-field mobility of electrons in MOS inversion layers , 1991 .

[4]  Pass transistor designs using pocket implant to improve manufacturability for 256 Mbit DRAM and beyond , 1994, Proceedings of 1994 IEEE International Electron Devices Meeting.

[5]  S. Ogura,et al.  Halo doping effects in submicron DI-LDD device design , 1985, 1985 International Electron Devices Meeting.

[6]  Bin Yu,et al.  50 nm gate-length CMOS transistor with super-halo: design, process, and reliability , 1999, International Electron Devices Meeting 1999. Technical Digest (Cat. No.99CH36318).

[7]  H. Wong,et al.  CMOS scaling into the nanometer regime , 1997, Proc. IEEE.

[8]  R. E. Thomas,et al.  Carrier mobilities in silicon empirically related to doping and field , 1967 .

[9]  J. Hauser,et al.  Electron and hole mobilities in silicon as a function of concentration and temperature , 1982, IEEE Transactions on Electron Devices.

[10]  Ping K. Ko,et al.  Chapter 1 - Approaches to Scaling , 1989 .

[11]  Thomas Skotnicki,et al.  Optimization of V/sub th/ roll-off in MOSFET's with advanced channel architecture-retrograde doping and pockets , 1999 .

[12]  Chenming Calvin Hu,et al.  Performance and reliability design issues for deep-submicrometer MOSFETs , 1991 .

[13]  J. Brews A charge-sheet model of the MOSFET , 1978 .

[14]  Atsushi Hori,et al.  Quarter-micrometer SPI (Self-aligned Pocket Implantation) MOSFET's and its application for low supply voltage operation , 1995 .

[15]  Sensitivity of subthreshold current to profile variations in long-channel MOSFETs , 1996 .

[16]  Bin Yu,et al.  Short-channel effect improved by lateral channel-engineering in deep-submicronmeter MOSFET's , 1997 .

[17]  T. Hori,et al.  A 0.1 /spl mu/m CMOS technology with tilt-implanted punchthrough stopper (TIPS) , 1994, Proceedings of 1994 IEEE International Electron Devices Meeting.

[18]  Yon-Sup Pang,et al.  Design of 0.1-μm pocket n-MOSFETs for low-voltage applications , 2002 .

[19]  P. Woerlee,et al.  A simple model for quantisation effects in heavily-doped silicon MOSFETs at inversion conditions , 1994 .

[20]  Yon-Sup Pang,et al.  Analytical subthreshold surface potential model for pocket n-MOSFETs , 2002 .

[21]  D. Jung,et al.  A 0.25 µm Complementary Metal Oxide Semiconductor Field Effect Transistor (CMOSFET) using Halo Implantation for 1 Gbit Dynamic Random Access Memory (DRAM) , 1996 .