论文信息 - Design for testability features of the SUN microsystems niagara2 CMP/CMT SPARC chip

Design for testability features of the SUN microsystems niagara2 CMP/CMT SPARC chip

The Niagara2 System-on-Chip is SUN Microsystem's latest processor in the Eco-sensitive CoolThreads line of multi-threaded servers. This DFT survey of the Niagara2 chip introduces the RAWWCas memory test, a Hybrid Flop Design and a fast efficient bitmapping architecture called DMO. It also showcases some excellent DFT results for this challenging system-on-chip design project.

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