Tunneling Field Effect Transistors for Enhancing Energy Efficiency and Hardware Security of IoT Platforms: Challenges and Opportunities

Tunneling Field-Effect Transistor (TFET) is a leading future transistor option for next generation VLSI applications and Internet of things (IoT). Many have demonstrated the energy efficiency of TFET circuits. In this work, we demonstrate for the first time utilizing TFET ambipolar device characteristics for jitter generation in post-processing circuits of true random number generators (TRNGs) and suitability for enhancing hardware security of IoT platforms. Device and circuit design challenges for TFET based transceiver designs for capacitive coupled interconnect in 3DIC and on-chip low dropout digital voltage regulators (DLDOs) are further explored towards energy efficient IoT platforms.

[1]  T. Sakurai,et al.  Daisy Chain for Power Reduction in Inductive-Coupling CMOS Link , 2006, 2006 Symposium on VLSI Circuits, 2006. Digest of Technical Papers..

[2]  Markus Dichtl.  Bad and Good Ways of Post-processing Biased Physical Random Numbers , 2007, FSE.

[3]  Mau-Chung Frank Chang,et al.  Two 10Gb/s/pin Low-Power Interconnect Methods for 3D ICs , 2007, 2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.

[4]  Tadahiro Kuroda,et al.  A 0.14pJ/b Inductive-Coupling Inter-Chip Data Transceiver with Digitally-Controlled Precise Pulse Shaping , 2007, 2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.

[5]  R. Guerrieri,et al.  3-D Capacitive Interconnections With Mono- and Bi-Directional Capabilities , 2008, IEEE Journal of Solid-State Circuits.

[6]  W. Choi,et al.  Ambipolarity characterization of tunneling field-effect transistors , 2010, 2010 Silicon Nanoelectronics Workshop.

[7]  C. Hu,et al.  Tunnel FET-based pass-transistor logic for ultra-low-power applications , 2011, 69th Device Research Conference.

[8]  Tony Tae-Hyoung Kim,et al.  A 3-Gb/s/ch Simultaneous Bidirectional Capacitive Coupling Transceiver for 3DICs , 2014, IEEE Transactions on Circuits and Systems II: Express Briefs.

[9]  Narayanan Vijaykrishnan,et al.  Tunnel FET RF Rectifier Design for Energy Harvesting Applications , 2014, IEEE Journal on Emerging and Selected Topics in Circuits and Systems.

[10]  James Tschanz,et al.  A 32 nm Embedded, Fully-Digital, Phase-Locked Low Dropout Regulator for Fine Grained Power Management in Digital Circuits , 2014, IEEE Journal of Solid-State Circuits.

[11]  Michael Niemier,et al.  Analog Circuit Design Using Tunnel-FETs , 2015, IEEE Transactions on Circuits and Systems I: Regular Papers.

[12]  Tak-Jun Oh,et al.  A 110-nm CMOS 0.7-V Input Transient-Enhanced Digital Low-Dropout Regulator With 99.98% Current Efficiency at 80-mA Load , 2015, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[13]  Luca Selmi,et al.  Impact of TFET Unidirectionality and Ambipolarity on the Performance of 6T SRAM Cells , 2015, IEEE Journal of the Electron Devices Society.

[14]  I. Young,et al.  Tunneling field effect transistors: Device and circuit considerations for energy efficient logic opportunities , 2015, 2015 IEEE International Electron Devices Meeting (IEDM).

[15]  Arijit Raychowdhury,et al.  5.6 A 0.13μm fully digital low-dropout regulator with adaptive control and reduced dynamic stability for ultra-wide dynamic range , 2015, 2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers.

[16]  Woo Young Choi.  Miller effect suppression of tunnel field-effect transistors (TFETs) using capacitor neutralisation , 2016 .

[17]  Ramesh Vaddi,et al.  Reliability enhancement of a steep slope tunnel transistor based ring oscillator designs with circuit interaction , 2016, IET Circuits Devices Syst..

[18]  David Cavalheiro,et al.  TFET-Based Power Management Circuit for RF Energy Harvesting , 2017, IEEE Journal of the Electron Devices Society.

[19]  Patrick P. Mercier,et al.  20.3 A 100nA-to-2mA successive-approximation digital LDO with PD compensation and sub-LSB duty control achieving a 15.1ns response time at 0.5V , 2017, 2017 IEEE International Solid-State Circuits Conference (ISSCC).

[20]  Tony Tae-Hyoung Kim,et al.  Yield Enhancement of Face-to-Face Cu–Cu Bonding With Dual-Mode Transceivers in 3DICs , 2017, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[21]  Gyu-Hyeong Cho,et al.  A 200-mA Digital Low Drop-Out Regulator With Coarse-Fine Dual Loop in Mobile Application Processor , 2017, IEEE Journal of Solid-State Circuits.

[22]  Le Ye,et al.  Benchmarking TFET from a circuit level perspective: Applications and guideline , 2017, 2017 IEEE International Symposium on Circuits and Systems (ISCAS).