Performance of a new digital baseband predistorter using calibration memory

Digital predistortion of a baseband signal is a well-known method of power amplifier (PA) linearization used to reduce adjacent channel interference (ACI) in a nonconstant envelope modulation system. This paper proposes a specific predistorter configuration based on the estimation of the PA characteristics extracting its linear behavior and comparing with a linear model by means of a calibrating signal. The effects of quadrature modulator and demodulator imbalances are included in our analysis. The effects and requirements of the reconstruction filters are stated and a new method for the loop delay estimation is presented. We also focus our attention in some design considerations and simulation results related to the use of a fixed point digital signal processor (DSP). Simulations show that out-of-band skirts lower than -60 dBc can be obtained for a narrow bandwidth system.

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