Modeling of Distributed RLC Interconnect and Transmission Line via Closed Forms and Recursive Algorithms

This paper presents the closed forms of the state-space models and the recursive algorithms of the transfer function models for fast and accurate modeling of the distributed RLC interconnect and transmission lines, which may be evenly or unevenly distributed. Considered models include the distributed RLC interconnect lines with or without external source and load connection. The effective closed forms and recursive algorithms do not involve any matrix inverse, LU matrix factorization, or matrix multiplication, thus reducing the computation complexity dramatically. Especially, the computation complexity of the closed forms for any evenly or unevenly distributed RLC interconnect line circuits is only O(1) or O(m), respectively, in sense of the scalar multiplication times, where m ¿ N of the system order. The features of new recursive algorithms are two recursive s-polynomials and the low computation complexity. Examples illustrate the new methods in both time and frequency domains. Comparing with the PSpice, the new methods can dramatically reduce the runtime of the time responses and the Bode plots by 25% - 98.5% in the examples. The results can be applied to the RLC interconnect analysis and model reduction as a key to new approach.

[1]  Yehea I. Ismail,et al.  Realizable reduction of RLC circuits using node elimination , 2003, Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03..

[2]  Wang Ben,et al.  Balanced truncated models of RC interconnect circuits and their simulation , 2005 .

[3]  J. Doyle,et al.  Essentials of Robust Control , 1997 .

[4]  Ben Wang,et al.  ELO MODEL REDUCTION AND CASE STUDY OF EVENLY DISTRIBUTED RC INTERCONNECT , 2005 .

[5]  YuanBaoguo,et al.  BALANCED TRUNCATED MODELS OF RC INTERCONNECT CIRCUITS AND THEIR SIMULATION , 2005 .

[6]  Ben Wang,et al.  Evenly Distributed Rc Interconnect Elo Model Simplification and its Simulation , 2007 .

[7]  Ernest S. Kuh,et al.  On projection-based algorithms for model-order reduction of interconnects , 2002 .

[8]  Sung-Mo Kang,et al.  Interconnection delay in very high-speed VLSI , 1991 .

[9]  D. Zhou,et al.  A simplified synthesis of transmission lines with a tree structure , 1994 .

[10]  L.M. Silveira,et al.  Generating compact, guaranteed passive reduced-order models of 3-D RLC interconnects , 2004, IEEE Transactions on Advanced Packaging.

[11]  Kaustav Banerjee,et al.  Analysis of on-chip inductance effects for distributed RLC interconnects , 2002, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[12]  R. Freund Reduced-Order Modeling Techniques Based on Krylov Subspaces and Their Use in Circuit Simulation , 1999 .

[13]  Chittaranjan A. Mandal,et al.  Timing analysis of tree-like RLC circuits , 2002, 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353).

[14]  Janet Roveda,et al.  Passive model order reduction algorithm based on Chebyshev expansion of impulse response of interconnect networks , 2000, DAC.

[15]  Lawrence T. Pileggi,et al.  Asymptotic waveform evaluation for timing analysis , 1990, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[16]  Michael L. Reed,et al.  Applied Introductory Circuit Analysis for Electrical and Computer Engineers , 1998 .

[17]  Massoud Pedram,et al.  Model-order reduction using variational balanced truncation with spectral shaping , 2006, IEEE Transactions on Circuits and Systems I: Regular Papers.

[18]  Roland W. Freund,et al.  Efficient linear circuit analysis by Pade´ approximation via the Lanczos process , 1994, EURO-DAC '94.

[19]  Wei Cai,et al.  Modeling of RC interconnect circuit and its recursive algorithm , 2002 .

[20]  Frank Wang,et al.  An efficient Lyapunov equation-based approach for generating reduced-order models of interconnect , 1999, DAC '99.

[21]  Baoguo Yuan,et al.  RC interconnect circuits and its balanced truncated models , 2004, Fifth World Congress on Intelligent Control and Automation (IEEE Cat. No.04EX788).

[22]  Yehea I. Ismail,et al.  DTT: direct truncation of the transfer function - an alternative tomoment matching for tree structured interconnect , 2002, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[23]  Luís Miguel Silveira,et al.  Guaranteed passive balancing transformations for model order reduction , 2002, DAC '02.