Multicore SoCs Design Methods

Systems-on-chip designs have evolved from fairly simple uni-core, single memory designs to complex multicore SoCs consisting of tens or hundreds of cores in a single chip. As more and more cores are integrated into these chips to share the ever increasing processing load, the main challenges lie in how to efficiently and quickly integrate these cores together into a single system capable of leveraging their individual flexibility. Moreover, for better inter-core communication, the multicore system requires high performance communication architectures and efficient communication protocols, such as hierarchical bus (Diefendorff 1997; Liu 2005), point-to-point connection (Loghi 2004), Time Division Multiplexed Access (TDMA) based bus (Kulkarani 2002), or packet-switching networks (Ben-Abdallah 2006).

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