Analytical model of drain current of cylindrical surrounding gate p-n-i-n TFET

Abstract An analytical model on the current–voltage characteristics of cylindrical surrounding gate p-n-i-n tunnel field-effect transistor (TFET) is developed. The model was derived by dividing the source, drain and channel regions into several portions so that some simple approximations for the surface potential across the tunneling junction and the channel can be achieved. Tunneling current is then calculated analytically by integrating the generation rate using the developed surface potential expressions over different regions. The results are verified with TCAD simulations. Good agreements in potential profile, transfer and output characteristics under different biasing conditions and with different device parameters are obtained. The applicability of this model for short-channel device is also discussed.

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