Low-Energy Heterogeneous Non-Volatile Memory Systems for Mobile Systems

Memory systems consume significant energy in hand-held embedded systems. Existing techniques for reducing memory energy requirements in low-power systems have addressed energy consumption when the system is turned on; but we also consider data retention energy during the power-off period. Semiconductor non-volatile memory is indispensable for hand-held devices that cannot afford magnetic disks due to excessive space, weight, cost and energy consumption. Current hand-held systems are generally equipped with more than one type of non-volatile storage device, such as battery-backed SDRAM, NOR Flash memory or NAND Flash memory, because each technology has its distinct and complementary features. In this paper, we introduce an energy-aware memory allocation in heterogeneous non-volatile memory systems to maximize the battery life. For this purpose, we first characterize cycle-accurate active mode energy and the data retention energy of non-volatile memory systems. Next, we present an energy-aware memory allocation for a given task set, taking into account arrival rate, execution time, code size, user data size and the number of memory transactions; we do this using trace-driven simulation. Experiments demonstrate that an optimized allocation can save up to 26% of the memory system energy compared with traditional allocation schemes.

[1]  Naehyuck Chang,et al.  Energy exploration and reduction of SDRAM memory systems , 2002, DAC '02.

[2]  Luca Benini,et al.  Energy-efficient design of battery-powered embedded systems , 1999, Proceedings. 1999 International Symposium on Low Power Electronics and Design (Cat. No.99TH8477).

[3]  Alvin R. Lebeck,et al.  Power aware page allocation , 2000, SIGP.

[4]  Chanik Park,et al.  A low-cost memory architecture with NAND XIP for mobile embedded systems , 2003, First IEEE/ACM/IFIP International Conference on Hardware/ Software Codesign and Systems Synthesis (IEEE Cat. No.03TH8721).

[5]  Donald E. Thomas,et al.  An environment for exploring low power memory configurations in system level design , 1999, Proceedings 1999 IEEE International Conference on Computer Design: VLSI in Computers and Processors (Cat. No.99CB37040).

[6]  K. U. Leuven-ESAT,et al.  SDRAM-Energy-Aware Memory Allocation for Dynamic Multi-Media Applications on Multi-Processor Platforms , 2003 .

[7]  Naehyuck Chang,et al.  Web-Based Energy Exploration Tool for Embedded Systems , 2004, IEEE Des. Test Comput..

[8]  Mahmut T. Kandemir,et al.  Scheduler-based DRAM energy management , 2002, DAC '02.

[9]  G. G. Stokes.  "J." , 1890, The New Yale Book of Quotations.

[10]  Luca Benini,et al.  A recursive algorithm for low-power memory partitioning , 2000, ISLPED'00: Proceedings of the 2000 International Symposium on Low Power Electronics and Design (Cat. No.00TH8514).

[11]  L. Benini,et al.  SDRAM-Energy-Aware Memory Allocation for Dynamic Multi-Media Applications on Multi-Processor Platforms , 2003, Embedded Software for SoC.