Verification of a CubeSat via hardware-in-the-loop simulation

This paper describes the hardware-in-the-loop (HIL) simulation methodology used for the verification of functional requirements of e-st @r-I CubeSat. The satellite's behavior is investigated via HIL simulation, and the results obtained are consistent with the expected values in any operative conditions. It is proven that HIL simulation is a valuable means for supporting the verification process of small satellites and may help reduce the time and cost of the development phase and increase mission reliability.

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