Using stochastic computing to implement digital image processing algorithms

As device scaling continues to nanoscale dimensions, circuit reliability will continue to become an ever greater problem. Stochastic computing, which performs computing with random bits (stochastic bits streams), can be used to enable reliable computation using those unreliable devices. However, one of the major issues of stochastic computing is that applications implemented with this technique are limited by the available computational elements. In this paper, first we will introduce and prove a stochastic absolute value function. Second, we will demonstrate a mathematical analysis of a stochastic tanh function, which is a key component used in a stochastic comparator. Third, we will present a quantitative analysis of a one-parameter linear gain function, and propose a new two-parameter version. The validity of the present stochastic computational elements is demonstrated through four basic digital image processing algorithms: edge detection, frame difference based image segmentation, median filter based noise reduction, and image contrast stretching. Our experimental results show that stochastic implementations tolerate more noise and consume less hardware than their conventional counterparts.

[1]  Weikang Qian,et al.  The synthesis of robust polynomial arithmetic with stochastic logic , 2008, 2008 45th ACM/IEEE Design Automation Conference.

[2]  Michail Maniatakos,et al.  Impact analysis of performance faults in modern microprocessors , 2009, 2009 IEEE International Conference on Computer Design.

[3]  David J. Lilja,et al.  Measuring computer performance : A practitioner's guide , 2000 .

[4]  Xin Li,et al.  A reconfigurable stochastic architecture for highly reliable computing , 2009, GLSVLSI '09.

[5]  Howard C. Card,et al.  Stochastic Neural Computation II: Soft Competitive Learning , 2001, IEEE Trans. Computers.

[6]  David Blaauw,et al.  An Active Decoupling Capacitance Circuit for Inductive Noise Suppression in Power Supply Networks , 2006, 2006 International Conference on Computer Design.

[7]  Alexandre Schmid,et al.  Reliability of Nanoscale Circuits and Systems , 2011 .

[8]  Xin Li,et al.  An Architecture for Fault-Tolerant Computation with Stochastic Logic , 2011, IEEE Transactions on Computers.

[9]  B. Gaines Techniques of Identification with the Stochastic Computer , 1967 .

[10]  Brian R. Gaines,et al.  Stochastic Computing Systems , 1969 .

[11]  Sunil P. Khatri,et al.  A novel, highly SEU tolerant digital circuit design approach , 2008, 2008 IEEE International Conference on Computer Design.

[12]  Howard C. Card,et al.  Stochastic Neural Computation I: Computational Elements , 2001, IEEE Trans. Computers.

[13]  Massoud Pedram,et al.  Probabilistic error propagation in logic circuits using the Boolean difference calculus , 2008, 2008 IEEE International Conference on Computer Design.

[14]  Werner Friesenbichler,et al.  Fault tolerant Four-State Logic by using Self-Healing Cells , 2008, 2008 IEEE International Conference on Computer Design.

[15]  David Blaauw,et al.  Interconnect performance corners considering crosstalk noise , 2009, 2009 IEEE International Conference on Computer Design.

[16]  Matthew R. Guthaus,et al.  Fault-tolerant synthesis using non-uniform redundancy , 2009, 2009 IEEE International Conference on Computer Design.