A mixed-signal integrated circuit for FM-DCSK modulation

This paper presents a mixed-signal ASIC for a frequency-modulated differential chaos shift keying (FM-DCSK) communication system, which has been implemented in a 2P-3M 0.35 /spl mu/m CMOS technology. The prototype has been provided with several programming capabilities to serve as an experimental platform for the evaluation of the FM-DCSK modulation scheme. The operation of the integrated circuit is herein illustrated for a data rate of 500 kb/s and a transmission bandwidth in the range of 17 MHz. Based on experimental results, an estimation of the bit error rate (BER) performance of the modulation scheme in a wireless environment at the 2.4 GHz ISM band, under different propagation conditions, has been realized. Measured results confirm theoretical predictions.

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