Advanced InP DHBT process for high speed LSI circuits

We report on the development of an advanced InP double heterojunction bipolar transistor (DHBT) technology that utilizes electroplated device contacts and dielectric sidewall spacers to form a self-aligned base-emitter junction. These processes permit aggressive scaling of the transistor, while achieving high levels of yield and manufacturability. HBTs with 0.5 mum emitter junction widths have been demonstrated with an ft/fmax of 405/390 GHz and a common-emitter breakdown voltage BVCEO >4 V. Large-scale direct digital synthesizer (DDS) circuits have been fabricated operating at clock rates up to 24 GHz.

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