Economic analysis of jet deposition through technical cost modeling

Advances in the microelectronics industry have focused on device miniaturization and have resulted in high I/O counts and increased circuit density. The reduction of device size has directly led to an increased performance demand on packaging technologies, and in turn, on solder deposition technologies. The eventual selection criteria for a given technology is based on the relationship between cost and performance characteristics. Therefore, a quantitative analysis of solder deposition cost is critical in selecting the optimum process for a given packaging application. IBIS has applied its detailed Technical Cost Model (TCM) methodology to evaluating the economics of an emerging solder jet deposition technology, through a wafer bumping manufacturing scenario. Detailed cost analyses have been performed and results are presented. Manufacturing costs are broken down by operation for the variable costs (material, labor, utility), and fixed costs (equipment, tooling, building, overhead, maintenance, and cost of capital). Analyses yield information valuable to process election by comparing cost as a function of material selection, process yield, production volume, and process rate. Comparisons of jet deposition with competing technologies like high- accuracy stencil printing and plating are also under development.