Formal worst-case timing analysis of Ethernet TSN's time-aware and peristaltic shapers

Ethernet is considered as a future communication standard for distributed embedded systems in the automotive and industrial domains. A key challenge is the deterministic low-latency transport of Ethernet frames, as many safety-critical real-time applications in these domains have tight timing requirements. Time-sensitive networking (TSN) is an upcoming set of Ethernet standards, which (among other things) address these requirements by specifying new quality of service mechanisms in the form of different traffic shapers. In this paper, we consider TSN's time-aware and peristaltic shapers and evaluate whether these shapers are able to fulfill these strict timing requirements. We present a formal timing analysis, which is a key requirement for the adoption of Ethernet in safety-critical real-time systems, to derive worst-case latency bounds for each shaper. We use a realistic automotive Ethernet setup to compare these shapers to each other and against Ethernet following IEEE 802.1Q.

[1]  Rolf Ernst,et al.  Exploiting shaper context to improve performance bounds of Ethernet AVB networks , 2014, 2014 51st ACM/EDAC/IEEE Design Automation Conference (DAC).

[2]  Rolf Ernst,et al.  Modeling of Ethernet AVB Networks for Worst-Case Timing Analysis , 2012 .

[3]  Rolf Ernst,et al.  Formal worst-case timing analysis of Ethernet topologies with strict-priority and AVB switching , 2012, 7th IEEE International Symposium on Industrial Embedded Systems (SIES'12).

[4]  Alan Burns,et al.  An extendible approach for analyzing fixed priority hard real-time tasks , 1994, Real-Time Systems.

[5]  Giovanni Pau,et al.  2012 IEEE Vehicular Networking Conference (VNC) , 2012 .

[6]  Giuliana Alderisi,et al.  Simulative assessments of IEEE 802.1 Ethernet AVB and Time-Triggered Ethernet for Advanced Driver Assistance Systems and in-car infotainment , 2012, 2012 IEEE Vehicular Networking Conference (VNC).

[7]  Rolf Ernst,et al.  Formal Timing Analysis of Full Duplex Switched Based Ethernet Network Architectures , 2010 .

[8]  Rolf Ernst,et al.  Improving formal timing analysis of switched ethernet by exploiting FIFO scheduling , 2015, 2015 52nd ACM/EDAC/IEEE Design Automation Conference (DAC).

[9]  Alan Burns,et al.  Controller Area Network (CAN) schedulability analysis: Refuted, revisited and revised , 2007, Real-Time Systems.

[10]  Johan J. Lukkien,et al.  Analysis of Ethernet-switch traffic shapers for in-vehicle networking applications , 2015, 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE).

[11]  Rolf Ernst,et al.  System level performance analysis - the SymTA/S approach , 2005 .

[12]  Lothar Thiele,et al.  Real-time calculus for scheduling hard real-time systems , 2000, 2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353).

[13]  J. Diemer,et al.  Exploring the worst-case timing of Ethernet AVB for industrial applications , 2012, IECON 2012 - 38th Annual Conference on IEEE Industrial Electronics Society.