Improving hardware Trojan detection by retiming

Abstract Hardware Trojan horses (HTHs) are challenging threats to the security of silicon chips. A promising solution is path-delay fingerprinting for HTH detection. This paper presents trust-driven retiming ( TDR ) , a synthesis approach to provide a circuit which can be analyzed more effectively by delay fingerprinting. To this end, TDR tries to reduce the maximum-delay path among all shortest paths crossing each node. We prove that HTH detection probability (HDP) is improved if delay fingerprinting is performed on shorter paths. Experimental results show that TDR can increase the HDP up to more than 90% at the cost of one clock cycle latency and a reasonable area overhead. The HDP tends to 100% if a 2% false alarm rate be acceptable.

[1]  Peichen Pan.  Continuous retiming: algorithms and applications , 1997, Proceedings International Conference on Computer Design VLSI in Computers and Processors.

[2]  Mark Mohammad Tehranipoor,et al.  Protection Against Hardware Trojan Attacks: Towards a Comprehensive Solution , 2013, IEEE Design & Test.

[3]  Mark Mohammad Tehranipoor,et al.  Hardware Trojan Detection and Isolation Using Current Integration and Localized Current Analysis , 2008, 2008 IEEE International Symposium on Defect and Fault Tolerance of VLSI Systems.

[4]  Hai Zhou,et al.  iRetILP: An efficient incremental algorithm for min-period retiming under general delay model , 2010, 2010 15th Asia and South Pacific Design Automation Conference (ASP-DAC).

[5]  John Lach,et al.  Performance of delay-based Trojan detection techniques under parameter variations , 2009, 2009 IEEE International Workshop on Hardware-Oriented Security and Trust.

[6]  Hai Zhou.  Deriving a new efficient algorithm for min-period retiming , 2005, ASP-DAC.

[7]  Berk Sunar,et al.  Trojan Detection using IC Fingerprinting , 2007, 2007 IEEE Symposium on Security and Privacy (SP '07).

[8]  Jason Jianjun Gu,et al.  Robust fault detection for the networked control system with model uncertainty , 2013, 2013 10th IEEE International Conference on Control and Automation (ICCA).

[9]  Sandeep K. Gupta,et al.  Trojan detection via delay measurements: A new approach to select paths and vectors to maximize effectiveness and minimize cost , 2013, 2013 Design, Automation & Test in Europe Conference & Exhibition (DATE).

[10]  John P. Hayes,et al.  Improving testability and soft-error resilience through retiming , 2009, 2009 46th ACM/IEEE Design Automation Conference.

[11]  Morteza Saheb Zamani,et al.  A study on the efficiency of hardware Trojan detection based on path-delay fingerprinting , 2014, Microprocess. Microsystems.

[12]  Giovanni De Micheli,et al.  Synthesis and Optimization of Digital Circuits , 1994 .

[13]  Donald B. Johnson,et al.  Finding All the Elementary Circuits of a Directed Graph , 1975, SIAM J. Comput..

[14]  Evangeline F.Y. Young,et al.  Rewired retiming for free flip-flop reductions without delay penalty , 2009, 2009 International Symposium on VLSI Design, Automation and Test.

[15]  Mark Mohammad Tehranipoor,et al.  A Novel Technique for Improving Hardware Trojan Detection and Reducing Trojan Activation Time , 2012, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[16]  Yu Wang,et al.  Network flow-based simultaneous retiming and slack budgeting for low power design , 2011, 16th Asia and South Pacific Design Automation Conference (ASP-DAC 2011).

[17]  Charles E. Leiserson,et al.  Retiming synchronous circuitry , 1988, Algorithmica.

[18]  Yiorgos Makris,et al.  Hardware Trojan detection using path delay fingerprint , 2008, 2008 IEEE International Workshop on Hardware-Oriented Security and Trust.

[19]  C. Read,et al.  Handbook of the normal distribution , 1982 .

[20]  Larry C. Andrews,et al.  Special Functions Of Mathematics For Engineers , 2022 .

[21]  Mark Mohammad Tehranipoor,et al.  Layout-Aware Switching Activity Localization to Enhance Hardware Trojan Detection , 2012, IEEE Transactions on Information Forensics and Security.

[22]  Jeyavijayan Rajendran,et al.  Design and analysis of ring oscillator based Design-for-Trust technique , 2011, 29th VLSI Test Symposium.

[23]  Hai Zhou.  Deriving a new efficient algorithm for min-period retiming , 2005, Proceedings of the ASP-DAC 2005. Asia and South Pacific Design Automation Conference, 2005..