论文信息 - MTJ/MOS-hybrid logic-circuit design flow for nonvolatile logic-in-memory LSI

MTJ/MOS-hybrid logic-circuit design flow for nonvolatile logic-in-memory LSI

A cell-based design flow for MTJ/MOS-hybrid logic circuits is presented towards the realization of practical-scale logic LSI based on nonvolatile logic-in-memory architecture. Newly-developed supplementary design tools including a precise MTJ device model enable to design MTJ/MOS-hybrid logic's intellectual properties (IPs) accurately. By the use of the IPs, various pattern layouts of the MOS and MTJ/MOS-hybrid logic-circuit cells can be automatically synthesized. The effectiveness of the proposed design flow is demonstrated through typical arithmetic-circuit design examples with a nonvolatile storage capability.

Takahiro Hanyu | Masanori Natsui | Noboru Sakimura | Tadahiko Sugibayashi

[1] T. Sugii,et al. Demonstration of non-volatile working memory through interface engineering in STT-MRAM , 2012, 2012 Symposium on VLSI Technology (VLSIT).

[2] Shoji Ikeda,et al. Standby-Power-Free Compact Ternary Content-Addressable Memory Cell Chip Using Magnetic Tunnel Junction Devices , 2009 .

[3] S. Ikeda,et al. 2 Mb SPRAM (SPin-Transfer Torque RAM) With Bit-by-Bit Bi-Directional Current Write and Parallelizing-Direction Current Read , 2008, IEEE Journal of Solid-State Circuits.

[4] Tetsuo Endoh,et al. Design of a Compact Nonvolatile Four-Input Logic Element Using a Magnetic Tunnel Junction and Metal-Oxide-Semiconductor Hybrid Structure , 2012 .

[5] Tetsuo Endoh,et al. Design of a 270ps-access 7-transistor/2-magnetic-tunnel-junction cell circuit for a high-speed-search nonvolatile ternary content-addressable memory , 2012 .

[6] Takahiro Hanyu,et al. Variation-resilient current-mode logic circuit design using MTJ devices , 2012, 2012 IEEE International Symposium on Circuits and Systems.

[7] Yiran Chen,et al. Current Switching in MgO-Based Magnetic Tunneling Junctions , 2011, IEEE Transactions on Magnetics.

[8] H. Ohno,et al. Magnetic Tunnel Junctions for Spintronic Memories and Beyond , 2007, IEEE Transactions on Electron Devices.

[9] Hiroki Koike,et al. High-speed simulator including accurate MTJ models for spintronics integrated circuit design , 2012, 2012 IEEE International Symposium on Circuits and Systems.