New & improved models for SAT-based bi-decomposition
暂无分享,去创建一个
[1] H. A. Curtis,et al. A new approach to The design of switching circuits , 1962 .
[2] Jie-Hong Roland Jiang,et al. Bi-decomposing large Boolean functions via interpolation and satisfiability solving , 2008, 2008 45th ACM/IEEE Design Automation Conference.
[3] Sarma B. K. Vrudhula,et al. BDD Based Decomposition of Logic Functions with Application to FPGA Synthesis , 1993, 30th ACM/IEEE Design Automation Conference.
[4] Christoph Scholl. Functional decomposition with applications to FPGA synthesis , 2001 .
[5] Tsutomu Sasao,et al. On bi-decomposition of logic functions , 1997 .
[6] Hans K. Buning,et al. Propositional Logic: Deduction and Algorithms , 1999 .
[7] Sze-Tsen Hu. ON THE DECOMPOSITION OF SWITCHING FUNCTIONS , 1961 .
[8] Niklas Sörensson,et al. An Extensible SAT-solver , 2003, SAT.
[9] Kartik Mohanram,et al. Bi-decomposition of large Boolean functions using blocking edge graphs , 2010, 2010 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).
[10] Bernd Steinbach,et al. An algorithm for bi-decomposition of logic functions , 2001, Proceedings of the 38th Design Automation Conference (IEEE Cat. No.01CH37232).
[11] Joao Marques-Silva,et al. Improvements to satisfiability-based boolean function bi-decomposition , 2011, 2011 IEEE/IFIP 19th International Conference on VLSI and System-on-Chip.
[12] Mikolás Janota,et al. QBf-based boolean function bi-decomposition , 2012, 2012 Design, Automation & Test in Europe Conference & Exhibition (DATE).
[13] Jie-Hong Roland Jiang,et al. To SAT or Not to SAT: Scalable Exploration of Functional Dependency , 2010, IEEE Transactions on Computers.
[14] Shih-Chieh Chang,et al. Technology mapping for TLU FPGAs based on decomposition of binary decision diagrams , 1996, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[15] Jie-Hong R. Jiang,et al. To SAT or not to SAT: Ashenhurst decomposition in a large scale , 2008, ICCAD 2008.