论文信息 - Analysis of the quasi-saturation region of high voltage VDMOS devices

Analysis of the quasi-saturation region of high voltage VDMOS devices

Abstract The effect of the epitaxial layer on the quasi-saturation region of the ID(VD) characteristic of a high voltage n-channel VDMOS structure is analysed. The proposed model takes into account the cylindrical shape of the P-well/N−-epilayer junction and the pinching effect of the current between neighbouring cells.

E. Figueras | Jose Rebollo | E. Lora-Tamayo | F. Serra-Mestres | José Millan

[1] B. Hoefflinger,et al. A parametric short-channel MOS transistor model for subthreshold and strong inversion current , 1984, IEEE Transactions on Electron Devices.

[2] E. Fong,et al. Power DMOS for high-frequency and switching applications , 1980, IEEE Transactions on Electron Devices.

[3] P. Hower,et al. Comparison of various source-gate geometries for power MOSFET's , 1981, IEEE Transactions on Electron Devices.

[4] J.D. Plummer,et al. Modeling of the on-resistance of LDMOS, VDMOS, and VMOS power transistors , 1980, IEEE Transactions on Electron Devices.

[5] B. Jayant Baliga,et al. Improving the reverse recovery of power mosfet integral diodes by electron irradiation , 1983 .