The factorial Delay Locked Loop: a solution to fulfill multistandard RF synthesizer requirements

This paper presents the study of a frequency synthesizer dedicated to multistandard wireless objects: the factorial delay locked loop (DLL). Feasibility of such a circuit has been already made, according to behavioral simulations, but no investigation was performed on the ability of the system to take into account all the requirements of multistandard frequency synthesizer, and particularly, the phase noise response of the system.

[1]  Y. Deval,et al.  A Disruptive Software-Defined Radio Receiver Architecture Based on Sampled Analog Signal Processing , 2007, 2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium.

[2]  Roland E. Best.  Phase-Locked Loops , 1984 .

[3]  Y. Deval,et al.  A programmable CMOS RF frequency synthesizer for multi-standard wireless applications , 2004, The 2nd Annual IEEE Northeast Workshop on Circuits and Systems, 2004. NEWCAS 2004..

[4]  Behzad Razavi,et al.  RF Microelectronics , 1997 .

[5]  Yann Deval,et al.  A VLSI CMOS delay oriented waveform converter for polyphase frequency synthesizer , 2002 .

[6]  Y. Deval,et al.  The frequency generation unit: a complex frequency synthesizer for multi-standard smart objects , 2004, The 2nd Annual IEEE Northeast Workshop on Circuits and Systems, 2004. NEWCAS 2004..

[7]  Chulwoo Kim,et al.  A CMOS DLL-based 120MHz to 1.8GHz clock generator for dynamic frequency scaling , 2005, ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005..

[8]  Y. Deval,et al.  Clock generator using factorial DLL for video applications , 2001, Proceedings of the IEEE 2001 Custom Integrated Circuits Conference (Cat. No.01CH37169).

[9]  K. S. Kundert.  Introduction to RF simulation and its application , 1999 .

[10]  Jan Craninckx,et al.  4G terminals: how are we going to design them? , 2003, Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451).

[11]  K. S. Kundert,et al.  Introduction to RF simulation and its application , 1998, Proceedings of the 1998 Bipolar/BiCMOS Circuits and Technology Meeting (Cat. No.98CH36198).

[12]  Masanori Hashimoto,et al.  A performance comparison of PLLs for clock generation using ring oscillator VCO and LC oscillator in a digital CMOS process , 2004 .

[13]  F. Svelto,et al.  Toward multistandard mobile terminals - fully integrated receivers requirements and architectures , 2005, IEEE Transactions on Microwave Theory and Techniques.

[14]  S. Crand,et al.  Behavioral modeling and simulation of mixed signal front-end for software defined radio terminals , 2004, 2004 IEEE International Symposium on Industrial Electronics.