Analysis of the switching speed limitation of wide band-gap devices in a phase-leg configuration

Advanced power semiconductor devices, especially wide band-gap devices, have inherent capability for fast switching. However, due to the limitation of gate driver capability and the interaction between two devices in a phase-leg during switching transient (cross talk), the switching speed is slower than expected in practical use. This paper focuses on identifying the key limiting factors for switching speed. The results provide the basis for improving gate drivers, eliminating interference, and boosting switching speed. Based on the EPC2001 Gallium Nitride transistor, both simulation and experimental results verify that the limiting factors in the gate loop include the pull-up (-down) resistance of gate driver, rise (fall) time and amplitude of gate driver output voltage; among these the rise (fall) time plays the primary role. Another important limiting factor of device switching speed is the spurious gate voltage induced by cross talk between two switches in a phase-leg. This induced gate voltage is not only determined by the switch speed, but also depends on the gate loop impedance, junction capacitance, and operating conditions of the complementary device.

[1]  J. Roudet,et al.  MOSFET switching behaviour under influence of PCB stray inductance , 1996, IAS '96. Conference Record of the 1996 IEEE Industry Applications Conference Thirty-First IAS Annual Meeting.

[2]  J.L. Schanen,et al.  Switching disturbance due to source inductance for a power MOSFET: analysis and solutions , 1996, PESC Record. 27th Annual IEEE Power Electronics Specialists Conference.

[3]  P. Venkataraghavan,et al.  The dV/dt capability of MOS-gated thyristors , 1998 .

[4]  J. Lai,et al.  Characterization of power electronics system interconnect parasitics using time domain reflectometry , 1998, PESC 98 Record. 29th Annual IEEE Power Electronics Specialists Conference (Cat. No.98CH36196).

[5]  Thomas Wu.  CDV/DT INDUCED TURN-ON IN SYNCHRONOUS BUCK REGULATORS , 2001 .

[6]  H. Shah,et al.  Analytical modeling and experimental evaluation of interconnect parasitic inductance on MOSFET switching characteristics , 2004, Nineteenth Annual IEEE Applied Power Electronics Conference and Exposition, 2004. APEC '04..

[7]  S. Mazumder,et al.  DV/DT related spurious gate turn-on of bidirectional switches in a high-frequency cycloconverter , 2005, IEEE Transactions on Power Electronics.

[8]  G. Stojcic,et al.  Characterization of $Cdv/dt$ Induced Power Loss in Synchronous Buck DC–DC Converters , 2007 .

[9]  Dushan Boroyevich,et al.  Experimental parametric study of the parasitic inductance influence on MOSFET switching characteristics , 2010, The 2010 International Power Electronics Conference - ECCE ASIA -.

[10]  Weifeng Sun,et al.  Analysis and design optimization of brushless DC motor's driving circuit considering the Cdv/dt induced effect , 2010, 2010 IEEE Energy Conversion Congress and Exposition.

[11]  D. Boroyevich,et al.  Evaluation of the switching characteristics of a gallium-nitride transistor , 2011, 2011 IEEE Energy Conversion Congress and Exposition.

[12]  Leon M. Tolbert,et al.  Characterization of a high temperature multichip SiC JFET-based module , 2011, 2011 IEEE Energy Conversion Congress and Exposition.

[13]  M. Acanski,et al.  Comparison of Si and GaN power devices used in PV module integrated converters , 2011, 2011 IEEE Energy Conversion Congress and Exposition.

[14]  Fred Wang,et al.  Investigation of Si IGBT operation at 200 °C for traction application , 2011, 2011 IEEE Energy Conversion Congress and Exposition.

[15]  I. Josifovic,et al.  Improving SiC JFET Switching Behavior Under Influence of Circuit Parasitics , 2012, IEEE Transactions on Power Electronics.