Extraction of off-set region length for off-set gate MOSFETs

Abstract The off-set region length of off-set gate MOSFETs is extracted from the linear relations between the total channel resistance and the design off-set region length. This extraction method uses the values obtained by the conventional two-step regression line method. The influence of MOSFET channel resistance in the total channel resistance measurements is removed by extrapolating the gate bias of the MOSFET to infinity. Both experimental data and two-dimensional device simulation confirm that this extraction can accurately determine the off-set region length.