A highly parameterizable parallel processor array architecture
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Jürgen Teich | Frank Hannig | Dmitrij Kissler | Alexey Kupriyanov | J. Teich | Frank Hannig | D. Kissler | A. Kupriyanov
[1] D. Kissler,et al. Hardware Cost Analysis for Weakly Programmable Processor Arrays , 2006, 2006 International Symposium on System-on-Chip.
[2] Reiner W. Hartenstein,et al. A decade of reconfigurable computing: a visionary retrospective , 2001, Proceedings Design, Automation and Test in Europe. Conference and Exhibition 2001.
[3] Hideharu Amano,et al. RoMultiC: fast and simple configuration data multicasting scheme for coarse grain reconfigurable devices , 2005, Proceedings. 2005 IEEE International Conference on Field-Programmable Technology, 2005..
[4] Wayne Luk,et al. Reconfigurable computing: architectures and design methods , 2005 .
[5] Majid Sarrafzadeh,et al. A quick safari through the reconfiguration jungle , 2001, Proceedings of the 38th Design Automation Conference (IEEE Cat. No.01CH37232).
[6] Markus Weinhardt,et al. PACT XPP—A Self-Reconfigurable Data Processing Architecture , 2004, The Journal of Supercomputing.
[7] Soo-Mook Moon,et al. Generalized Multiway Branch Unit for VLIW Microprocessors , 1995, IEEE Trans. Parallel Distributed Syst..
[8] Henry Hoffmann,et al. The Raw Microprocessor: A Computational Fabric for Software Circuits and General-Purpose Programs , 2002, IEEE Micro.
[9] Malgorzata Marek-Sadowska,et al. FPGA interconnect planning , 2002, SLIP '02.
[10] Frank Vahid,et al. Parameterized system design , 2000, Proceedings of the Eighth International Workshop on Hardware/Software Codesign. CODES 2000 (IEEE Cat. No.00TH8518).
[11] Jürgen Teich,et al. A Dynamically Reconfigurable Weakly Programmable Processor Array Architecture Template , 2006, ReCoSoC.
[12] V. Baumgarte,et al. PACT XPP-A Self-Reconfigurable Data Processing Architecture , 2001 .
[13] Wolfgang J. Paul,et al. Computer architecture - complexity and correctness , 2000 .