论文信息 - 10 Gbps, 530 fJ/b optical transceiver circuits in 40 nm CMOS

10 Gbps, 530 fJ/b optical transceiver circuits in 40 nm CMOS

This paper describes 10 Gbps optical modulator and receiver circuits designed for high energy efficiency in a 40 nm process. The transmitter consumes 135 fJ/b when bonded to an external silicon photonic ring modulator. The receiver, at −15 dBm sensitivity, consumes 395 fJ/b when bonded to an external photodiode.

[1] E. Alon,et al. Ultra-efficient 10 Gb/s hybrid integrated silicon photonic transmitter and receiver. , 2011, Optics express.

[2] Mark Ingels,et al. A 1-Gb/s, 0.7-/spl mu/m CMOS optical receiver with full rail-to-rail output swing , 1999 .

[3] Ashok V. Krishnamoorthy,et al. Computer Systems Based on Silicon Photonic Interconnects A proposed supercomputer-on-a-chip with optical interconnections between processing elements will require development of new lower-energy optical components and new circuit architectures that match electrical datapaths to complementary optical , 2009 .

[4] A.V. Krishnamoorthy,et al. Modulator-driver circuits for optoelectronic VLSI , 1997, IEEE Photonics Technology Letters.

[5] Ashok V. Krishnamoorthy,et al. Optical Interconnect for High-End Computer Systems , 2010, IEEE Design & Test of Computers.