Worst-Case Eye Analysis of High-Speed Channels Based on Bayesian Optimization

[1]  Nando de Freitas,et al.  Portfolio Allocation for Bayesian Optimization , 2010, UAI.

[2]  Carl E. Rasmussen,et al.  Gaussian processes for machine learning , 2005, Adaptive computation and machine learning.

[3]  Yu Hu,et al.  Worst case timing jitter and amplitude noise in differential signaling , 2009, 2009 10th International Symposium on Quality Electronic Design.

[4]  B. Mutnury,et al.  Macromodeling of nonlinear digital I/O drivers , 2006, IEEE Transactions on Advanced Packaging.

[5]  J.F. Buckwalter,et al.  Predicting Microwave Digital Signal Integrity , 2009, IEEE Transactions on Advanced Packaging.

[6]  Matthias Poloczek,et al.  Bayesian Optimization of Combinatorial Structures , 2018, ICML.

[7]  Nando de Freitas,et al.  A Tutorial on Bayesian Optimization of Expensive Cost Functions, with Application to Active User Modeling and Hierarchical Reinforcement Learning , 2010, ArXiv.

[8]  Zhaoqing Chen,et al.  A new approach to deriving packaging system statistical eye diagram based on parallel non-linear transient simulations using multiple short signal bit patterns , 2012, 2012 IEEE 62nd Electronic Components and Technology Conference.

[9]  Madhavan Swaminathan,et al.  Application of Machine Learning for Optimization of 3-D Integrated Circuits and Systems , 2017, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[10]  Dongbin Xiu,et al.  The Wiener-Askey Polynomial Chaos for Stochastic Differential Equations , 2002, SIAM J. Sci. Comput..

[11]  Madhavan Swaminathan,et al.  Determining worst-case eye height in low BER channels using Bayesian optimization , 2020, 2020 IEEE 11th Latin American Symposium on Circuits & Systems (LASCAS).

[12]  Jacob K. White,et al.  An electrical-level superposed-edge approach to statistical serial link simulation , 2009, 2009 IEEE/ACM International Conference on Computer-Aided Design - Digest of Technical Papers.

[13]  JiHong Ren,et al.  Multiple Edge Responses for Fast and Accurate System Simulations , 2008, IEEE Transactions on Advanced Packaging.

[14]  Zhaoqing Chen,et al.  Searching for the worst-case eye diagram of a signal channel in electronic packaging system including the effects of the nonlinear I/O devices and the crosstalk from adjacent channels , 2009, 2009 59th Electronic Components and Technology Conference.

[15]  Madhavan Swaminathan,et al.  Behavioral Modeling of Steady-State Oscillators with Buffers Using Neural Networks , 2018, 2018 IEEE 27th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS).

[16]  Madhavan Swaminathan,et al.  A Global Bayesian Optimization Algorithm and Its Application to Integrated System Design , 2018, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[17]  Madhavan Swaminathan,et al.  Bayesian Active Learning for Uncertainty Quantification of High Speed Channel Signaling , 2018, 2018 IEEE 27th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS).

[18]  M. Cases,et al.  The Nittany Genome Project: a genetic algorithm approach to optimize a worst case bitstream for package simulation , 2003, Electrical Performance of Electrical Packaging (IEEE Cat. No. 03TH8710).

[19]  Mark Weiser,et al.  Source Code , 1987, Computer.

[20]  Anthony Sanders,et al.  Channel Compliance Testing Utilizing Novel Statistical Eye Methodology , 2004 .

[21]  Dale Becker,et al.  Package and Printed Circuit Board Design of a 19.2 Gb/s Data Link for High-Performance Computing , 2017, 2017 IEEE 67th Electronic Components and Technology Conference (ECTC).

[22]  Jasper Snoek,et al.  Practical Bayesian Optimization of Machine Learning Algorithms , 2012, NIPS.

[23]  R. Mooney,et al.  An accurate and efficient analysis method for multi-Gb/s chip-to-chip signaling schemes , 2002, 2002 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.02CH37302).

[24]  B. Mutnury,et al.  Bit-pattern optimization for accurate analysis of complex high-speed interfaces , 2008, 2008 58th Electronic Components and Technology Conference.

[25]  Joungho Kim,et al.  A precise analytical eye-diagram estimation method for non-ideal high-speed channels , 2009, 2009 IEEE 18th Conference on Electrical Performance of Electronic Packaging and Systems.

[26]  Gaël Varoquaux,et al.  Scikit-learn: Machine Learning in Python , 2011, J. Mach. Learn. Res..

[27]  Madhavan Swaminathan,et al.  High-Dimensional Global Optimization Method for High-Frequency Electronic Design , 2019, IEEE Transactions on Microwave Theory and Techniques.

[28]  Mike P. Li,et al.  Jitter, Noise, and Signal Integrity at High-Speed , 2007 .

[29]  Eduardo C. Garrido-Merchán,et al.  Dealing with Categorical and Integer-valued Variables in Bayesian Optimization with Gaussian Processes , 2017, Neurocomputing.

[30]  Peter I. Frazier,et al.  A Tutorial on Bayesian Optimization , 2018, ArXiv.

[31]  Tianjian Lu,et al.  Transient Simulation for High-Speed Channels with Recurrent Neural Network , 2018, 2018 IEEE 27th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS).

[32]  Chenjie Gu,et al.  Fast eye diagram analysis for high-speed CMOS circuits , 2015, 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE).

[33]  Madhavan Swaminathan,et al.  A Hybrid Methodology for Jitter and Eye Estimation in High-Speed Serial Channels Using Polynomial Chaos Surrogate Models , 2019, IEEE Access.