Throughput and latency analysis of the Spidergon-Donut interconnection network
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[1] Franco P. Preparata,et al. The cube-connected-cycles: A versatile network for parallel computation , 1979, 20th Annual Symposium on Foundations of Computer Science (sfcs 1979).
[2] Miltos D. Grammatikakis,et al. Design of Cost-Efficient Interconnect Processing Units , 2008 .
[3] Wim Vanderbauwhede,et al. An analytical performance model for the Spidergon NoC with virtual channels , 2010, J. Syst. Archit..
[4] Charles E. Leiserson,et al. Fat-trees: Universal networks for hardware-efficient supercomputing , 1985, IEEE Transactions on Computers.
[5] Fadi N. Sibai,et al. Optimal Clustering of Hierarchical Hyper-Ring Multicomputers , 1999, The Journal of Supercomputing.
[6] Fadi N. Sibai,et al. A Two-Dimensional Low-Diameter Scalable On-Chip Network for Interconnecting Thousands of Cores , 2012, IEEE Transactions on Parallel and Distributed Systems.
[7] Fadi N. Sibai. Resource Sharing in Networks-on-Chip of Large Many-core Embedded Systems , 2009, 2009 International Conference on Parallel Processing Workshops.
[8] Fadi N. Sibai,et al. Design and evaluation of low latency interconnection networks for real-time many-core embedded systems , 2011, Comput. Electr. Eng..
[9] Sudhakar Yalamanchili,et al. Interconnection Networks: An Engineering Approach , 2002 .
[10] Alain Greiner,et al. Micro-network for SoC: implementation of a 32-port SPIN network , 2003, 2003 Design, Automation and Test in Europe Conference and Exhibition.
[11] Franco P. Preparata,et al. The cube-connected-cycles: A versatile network for parallel computation , 1979, 20th Annual Symposium on Foundations of Computer Science (sfcs 1979).
[12] Martin Hopkins,et al. Synergistic Processing in Cell's Multicore Architecture , 2006, IEEE Micro.
[13] William J. Dally,et al. Principles and Practices of Interconnection Networks , 2004 .
[14] Fadi N. Sibai,et al. The hyper-ring network: a cost-efficient topology for scalable multicomputers , 1998, SAC '98.
[15] Wang Li-fang,et al. Networks on Chips , 2005 .
[16] M. Coppola,et al. Spidergon: a novel on-chip communication network , 2004, 2004 International Symposium on System-on-Chip, 2004. Proceedings..
[17] Nicola Concer,et al. Simulation and analysis of network on chip architectures: ring, spidergon and 2D mesh , 2006, Proceedings of the Design Automation & Test in Europe Conference.
[18] William J. Dally. Enabling Technology for On-Chip Interconnection Networks , 2007, First International Symposium on Networks-on-Chip (NOCS'07).