A transformer-based 60GHz CMOS LNA for low voltage applications

A novel Low Noise Amplifier (LNA) topology with a transformer-based input integrated matching is here proposed and its application to 60-GHz. This new architecture achieves both input matching and gain boosting in cascode amplifier without requiring the conventional inductive source degeneration, which is known for gain decreasing at high frequency. The transformer has been designed with the 3-D electromagnetic simulator HFSSTM and is fully compatible with a CMOS bulk general purpose process design flow. Implemented in a 65 nm, post-layout simulations exhibit a -17 dB input matching and a 7.5 dB Noise Figure (NF) at 60 GHz. Biased under 1.2 V, this two-stage LNA reaches a 12.5 dB S21 for a 34 mW power consumption. Thanks to a lumped component design approach, the final circuit takes place in a 540 mum x 690 mum silicon area with PADs.